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From: Vineet Gupta <vineetg@rivosinc.com>
To: Vincent Chen <vincent.chen@sifive.com>,
	Florian Weimer <fweimer@redhat.com>
Cc: "Rich Felker" <dalias@libc.org>,
	"GNU C Library" <libc-alpha@sourceware.org>,
	"Andrew Waterman" <andrew@sifive.com>,
	"Palmer Dabbelt" <palmer@rivosinc.com>,
	"Kito Cheng" <kito.cheng@sifive.com>,
	"Christoph Müllner" <christoph.muellner@vrull.eu>,
	davidlt@rivosinc.com, "Arnd Bergmann" <arnd@arndb.de>,
	"Björn Töpel" <bjorn@kernel.org>,
	"Greentime Hu" <greentime.hu@sifive.com>,
	"Andy Chiu" <andy.chiu@sifive.com>
Subject: Re: RISCV kernel struct sigcontext expansion for V regs and potential glibc ABI break (was Re: [RFC patch 2/5] RISC-V: Reserve about 5K space in mcontext_t to support future ISA expansion.)
Date: Thu, 8 Dec 2022 20:03:14 -0800	[thread overview]
Message-ID: <37552b4f-15c0-9747-5c35-d1e4887fbfe8@rivosinc.com> (raw)
In-Reply-To: <d613968f-0fae-1994-3bee-fb10765167c3@rivosinc.com>

+CC Greentime and Andy

On 12/8/22 19:39, Vineet Gupta wrote:
> Hi Florian,
>
> P.S. Since I'm revisiting a year old thread with some new CC 
> recipients, here's the link to original patch/thread [1]
>
> On 9/17/21 20:04, Vincent Chen wrote:
>> On Thu, Sep 16, 2021 at 4:14 PM Florian Weimer <fweimer@redhat.com> 
>> wrote:
>>>>>> This changes the size of struct ucontext_t, which is an ABI break
>>>>>> (getcontext callers are supposed to provide their own object).
>>>>>>
>>>> The riscv vector registers are all caller-saved registers except for
>>>> VCSR. Therefore, the struct mcontext_t needs to reserve a space for
>>>> it. In addition, RISCV ISA is growing, so I also hope the struct
>>>> mcontext_t has a space for future expansion. Based on the above ideas,
>>>> I reserved a 5K space here.
>>> You have reserved space in ucontext_t that you could use for this.
>>>
>> Sorry, I cannot really understand what you mean. The following is the
>> contents of ucontext_t
>> typedef struct ucontext_t
>>    {
>>      unsigned long int  __uc_flags;
>>      struct ucontext_t *uc_link;
>>      stack_t            uc_stack;
>>      sigset_t           uc_sigmask;
>>      /* There's some padding here to allow sigset_t to be expanded in 
>> the
>>         future.  Though this is unlikely, other architectures put 
>> uc_sigmask
>>         at the end of this structure and explicitly state it can be
>>         expanded, so we didn't want to box ourselves in here. */
>>      char               __glibc_reserved[1024 / 8 - sizeof (sigset_t)];
>>      /* We can't put uc_sigmask at the end of this structure because 
>> we need
>>         to be able to expand sigcontext in the future.  For example, the
>>         vector ISA extension will almost certainly add ISA state.  We 
>> want
>>         to ensure all user-visible ISA state can be saved and 
>> restored via a
>>         ucontext, so we're putting this at the end in order to allow for
>>         infinite extensibility.  Since we know this will be extended 
>> and we
>>         assume sigset_t won't be extended an extreme amount, we're
>>         prioritizing this.  */
>>      mcontext_t uc_mcontext;
>>    } ucontext_t;
>>
>> Currently, we only reserve a space, __glibc_reserved[], for the future
>> expansion of sigset_t.
>> Do you mean I could use __glibc_reserved[] to for future expansion of
>> ISA as well?
>
> Given unlikely sigset expansion, we could in theory use some of those 
> reserved fields to store pointers (offsets) to actual V state, but not 
> for actual V state which is way too large for non-embedded machines 
> with typical 128 or even wider V regs.
>
>
>>
>>>>>> This shouldn't be necessary if the additional vector registers are
>>>>>> caller-saved.
>>>> Here I am a little confused about the usage of struct mcontext_t. As
>>>> far as I know, the struct mcontext_t is used to save the
>>>> machine-specific information in user context operation. Therefore, in
>>>> this case, the struct mcontext_t is allowed to reserve the space only
>>>> for saving caller-saved registers. However, in the signal handler, the
>>>> user seems to be allowed to use uc_mcontext whose data type is struct
>>>> mcontext_t to access the content of the signal context. In this case,
>>>> the struct mcontext_t may need to be the same as the struct sigcontext
>>>> defined at kernel. However, it will have a conflict with your
>>>> suggestion because the struct sigcontext cannot just reserve a space
>>>> for saving caller-saved registers. Could you help me point out my
>>>> misunderstanding? Thank you.
>
> I think the confusion comes from apparent equivalence of kernel struct 
> sigcontext and glibc mcontext_t as they appear in respective struct 
> ucontext definitions.
> I've enumerated the actual RV structs below to keep them handy in one 
> place for discussion.
>
>>> struct sigcontext is allocated by the kernel, so you can have pointers
>>> in reserved fields to out-of-line start, or after struct sigcontext.
>
> In this scheme, would the actual V regfile contents (at the 
> out-of-line location w.r.t kernel sigcontext) be anonymous for glibc 
> i.e. do we not need to expose them to glibc userspace ABI ?
>
>
>>> I don't know how the kernel implements this, but there is considerable
>>> flexibility and extensibility.  The main issues comes from small stacks
>>> which are incompatible with large register files.
>
> Simplistically, Linux kernel needs to preserve the V regfile across 
> task switch. The necessary evil that follows is preserving V across 
> signal-handling (sigaction/sigreturn).
>
> In RV kernel we have following:
>
> struct rt_sigframe {
>   struct siginfo info;
>   struct ucontext uc;
> };
>
> struct ucontext {
>    unsigned long uc_flags;
>    struct ucontext *uc_link;
>    stack_t uc_stack;
>    sigset_t uc_sigmask;
>    __u8 __unused[1024 / 8 - sizeof(sigset_t)];     // this is for 
> sigset_t expansion
>    struct sigcontext uc_mcontext;
> };
>
> struct sigcontext {
>    struct user_regs_struct sc_regs;
>    union __riscv_fp_state sc_fpregs;
> +  __u8 sc_extn[4096+128] __attribute__((__aligned__(16)));   // 
> handle 128B V regs
> };
>
> The sc_extn[] would have V state (regfile + control state) in kernel 
> defined format.
>
> As I understand it, you are suggesting to prevent ABI break, we should 
> not add anything to kernel struct sigcontext i.e. do something like this
>
> struct rt_sigframe {
>   struct siginfo info;
>   struct ucontext uc;
> +__u8 sc_extn[4096+128] __attribute__((__aligned__(16)));
> }
>
> So kernel sig handling can continue to save/restore the V regfile on 
> user stack, w/o making it part of actual struct sigcontext.
> So they are not explicitly visible to userspace at all - is that 
> feasible ? I know that SA_SIGINFO handlers can access the scalar/fp 
> regs, they won't do it V.
> Is there a POSIX req for SA_SIGINFO handlers being able to access all 
> machine regs saved by signal handling.
>
> An alternate approach is what Vincent did originally, to add sc_exn to 
> struct sigcontext. Here to prevent ABI breakage, we can choose to not 
> reflect this in the glibc sigcontext. But the question remains, is 
> that OK ?
>
> The other topic is changing glibc mcontext_t to add V-regs. It would 
> seem one has to as mcontext is "visually equivalent" to struct 
> sigcontext in the respective ucontext structs. But in unserspace 
> *context routine semantics only require callee-regs to be saved, which 
> V regs are not per psABI [2]. So looks like this can be avoided which 
> is what Vincent did in v2 series [3]
>
>
> [1] 
> https://sourceware.org/pipermail/libc-alpha/2021-September/130899.html
> [2] 
> https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc
> [3] https://sourceware.org/pipermail/libc-alpha/2022-January/135416.html


  reply	other threads:[~2022-12-09  4:03 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-13  1:41 [RFC patch 0/5] RISC-V: Add vector ISA support Vincent Chen
2021-09-13  1:41 ` [RFC patch 1/5] RISC-V: Remove riscv-specific sigcontext.h Vincent Chen
2021-09-13  1:41 ` [RFC patch 2/5] RISC-V: Reserve about 5K space in mcontext_t to support future ISA expansion Vincent Chen
2021-09-13 13:44   ` Florian Weimer via Libc-alpha
2021-09-13 13:52     ` Rich Felker
2021-09-16  8:02       ` Vincent Chen
2021-09-16  8:14         ` Florian Weimer via Libc-alpha
2021-09-18  3:04           ` Vincent Chen
2022-12-09  3:39             ` RISCV kernel struct sigcontext expansion for V regs and potential glibc ABI break (was Re: [RFC patch 2/5] RISC-V: Reserve about 5K space in mcontext_t to support future ISA expansion.) Vineet Gupta
2022-12-09  4:03               ` Vineet Gupta [this message]
2022-12-20 20:05               ` Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break Vineet Gupta
2022-12-21 15:53                 ` Vincent Chen
2022-12-21 19:45                   ` Vineet Gupta
2022-12-21 19:52                     ` Vineet Gupta
2022-12-22  3:37                       ` Vincent Chen
2022-12-22 19:25                         ` Vineet Gupta
2022-12-23  2:27                           ` Vincent Chen
2022-12-23 19:42                             ` Vineet Gupta
2022-12-22  5:32                       ` Richard Henderson via Libc-alpha
2022-12-22 18:33                         ` Andy Chiu
2022-12-22 20:27                           ` Vineet Gupta
2022-12-28 10:53                             ` Andy Chiu
2023-01-03 19:17                               ` Vineet Gupta
2023-01-04 16:34                                 ` Andy Chiu
2023-01-04 20:46                                   ` Vineet Gupta
2023-01-04 21:29                                     ` Philipp Tomsich
2023-01-04 21:37                                       ` Andrew Waterman
2023-01-04 22:43                                       ` Vineet Gupta
2023-01-09 13:33                                         ` Kito Cheng
2023-01-09 19:16                                           ` Vineet Gupta
2023-01-10 13:21                                             ` Kito Cheng
2023-01-10 18:07                                               ` Auto-enabling V unit and/or use of elf attributes (was Re: Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break) Vineet Gupta
2023-01-11  1:22                                                 ` Richard Henderson via Libc-alpha
2023-01-11  4:28                                                   ` Jeff Law
2023-01-11  4:57                                                     ` Richard Henderson via Libc-alpha
2023-01-11  5:07                                                       ` Jeff Law
2023-01-11  6:00                                                         ` Andy Chiu
2023-01-11  6:20                                                           ` Jeff Law
2023-01-11  9:28                                                             ` Andy Chiu
2023-01-11 12:13                                                               ` Andy Chiu
2023-01-23 12:17                                                                 ` Conor Dooley via Libc-alpha
2023-01-23 13:29                                                                   ` Andy Chiu
2023-01-11  5:05                                                   ` Anup Patel
2023-01-11  5:23                                                   ` Richard Henderson via Libc-alpha
2022-12-22 22:33                           ` Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break Richard Henderson via Libc-alpha
2022-12-22 23:47                           ` Conor Dooley via Libc-alpha
2022-12-22 23:58                             ` Vineet Gupta
2022-12-22 20:30                         ` Vineet Gupta
2022-12-22 21:38                           ` Andrew Waterman
2022-12-22  1:50                     ` Vincent Chen
2022-12-22  5:34                     ` Richard Henderson via Libc-alpha
2021-09-16 23:56         ` [RFC patch 2/5] RISC-V: Reserve about 5K space in mcontext_t to support future ISA expansion Ben Woodard via Libc-alpha
2021-09-18  3:15           ` Vincent Chen
2021-09-20 16:41             ` DJ Delorie via Libc-alpha
2021-09-20 17:10               ` Florian Weimer via Libc-alpha
2021-10-01  1:43                 ` Vincent Chen
2021-10-01 12:08                   ` Adhemerval Zanella via Libc-alpha
2021-09-17 17:03         ` Rich Felker
2021-09-18  3:19           ` Vincent Chen
2021-09-13  1:41 ` [RFC patch 3/5] RISC-V: Save and restore VCSR when doing user context switch Vincent Chen
2021-09-14 23:48   ` Joseph Myers
2021-09-15  0:13     ` Andrew Waterman
2021-09-16  9:20       ` Vincent Chen
2021-10-01 13:04   ` Adhemerval Zanella via Libc-alpha
2021-09-13  1:41 ` [RFC patch 4/5] RISC-V: Extend MINSIGSTKSZ and SIGSTKSZ to backup RVV registers Vincent Chen
2021-09-13 13:51   ` Rich Felker
2021-09-16  9:25     ` Vincent Chen
2021-09-13  1:41 ` [RFC 5/5] RISC-V: Expand PTHREAD_STACK_MIN to support RVV environment Vincent Chen
2021-09-14 23:43   ` Joseph Myers
2021-09-15 10:42     ` Florian Weimer via Libc-alpha
2021-09-15 14:31       ` H.J. Lu via Libc-alpha
2021-09-16 10:21         ` Vincent Chen
2021-09-13 19:11 ` [RFC patch 0/5] RISC-V: Add vector ISA support Vineet Gupta via Libc-alpha
2021-09-15 19:37   ` Jim Wilson
2021-11-09 19:21 ` Darius Rad
2021-11-09 19:30   ` Andrew Waterman
2021-11-09 22:03     ` Darius Rad
2021-11-09 22:18       ` Andrew Waterman
2021-11-10 11:39         ` Darius Rad

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