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From: "H.J. Lu via Libc-alpha" <libc-alpha@sourceware.org>
To: libc-alpha@sourceware.org
Subject: [PATCH 3/5] <sys/platform/x86.h>: Add AVX-VNNI support
Date: Thu,  8 Oct 2020 09:12:30 -0700	[thread overview]
Message-ID: <20201008161232.135513-4-hjl.tools@gmail.com> (raw)
In-Reply-To: <20201008161232.135513-1-hjl.tools@gmail.com>

Add AVX-VNNI support to <sys/platform/x86.h>.
---
 manual/platform.texi               | 3 +++
 sysdeps/x86/cpu-features.c         | 2 ++
 sysdeps/x86/sys/platform/x86.h     | 3 +++
 sysdeps/x86/tst-get-cpu-features.c | 2 ++
 4 files changed, 10 insertions(+)

diff --git a/manual/platform.texi b/manual/platform.texi
index 4f5fdff9d9..283f255679 100644
--- a/manual/platform.texi
+++ b/manual/platform.texi
@@ -198,6 +198,9 @@ The supported processor features are:
 @item
 @code{AVX2} -- The AVX2 instruction extensions.
 
+@item
+@code{AVX_VNNI} -- The AVX-VNNI instruction extensions.
+
 @item
 @code{AVX512_4FMAPS} -- The AVX512_4FMAPS instruction extensions.
 
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 4ecb8cee2c..b0fac22c27 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -119,6 +119,8 @@ update_usable (struct cpu_features *cpu_features)
 		  cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load]
 		    |= bit_arch_AVX_Fast_Unaligned_Load;
 		}
+	      /* Determine if AVX-VNNI is usable.  */
+	      CPU_FEATURE_SET_USABLE (cpu_features, AVX_VNNI);
 	      /* Determine if FMA is usable.  */
 	      CPU_FEATURE_SET_USABLE (cpu_features, FMA);
 	      /* Determine if VAES is usable.  */
diff --git a/sysdeps/x86/sys/platform/x86.h b/sysdeps/x86/sys/platform/x86.h
index 00cd151199..276de1eb6b 100644
--- a/sysdeps/x86/sys/platform/x86.h
+++ b/sysdeps/x86/sys/platform/x86.h
@@ -311,6 +311,7 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)
 /* COMMON_CPUID_INDEX_7_ECX_1.  */
 
 /* EAX.  */
+#define bit_cpu_AVX_VNNI	(1u << 4)
 #define bit_cpu_AVX512_BF16	(1u << 5)
 
 /* COMMON_CPUID_INDEX_19.  */
@@ -530,6 +531,7 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)
 /* COMMON_CPUID_INDEX_7_ECX_1.  */
 
 /* EAX.  */
+#define index_cpu_AVX_VNNI	COMMON_CPUID_INDEX_7_ECX_1
 #define index_cpu_AVX512_BF16	COMMON_CPUID_INDEX_7_ECX_1
 
 /* COMMON_CPUID_INDEX_19.  */
@@ -749,6 +751,7 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)
 /* COMMON_CPUID_INDEX_7_ECX_1.  */
 
 /* EAX.  */
+#define reg_AVX_VNNI		eax
 #define reg_AVX512_BF16		eax
 
 /* COMMON_CPUID_INDEX_19.  */
diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
index 7262c3a3fa..e87158d45b 100644
--- a/sysdeps/x86/tst-get-cpu-features.c
+++ b/sysdeps/x86/tst-get-cpu-features.c
@@ -221,6 +221,7 @@ do_test (void)
   CHECK_CPU_FEATURE (XFD);
   CHECK_CPU_FEATURE (INVARIANT_TSC);
   CHECK_CPU_FEATURE (WBNOINVD);
+  CHECK_CPU_FEATURE (AVX_VNNI);
   CHECK_CPU_FEATURE (AVX512_BF16);
   CHECK_CPU_FEATURE (AESKLE);
   CHECK_CPU_FEATURE (WIDE_KL);
@@ -376,6 +377,7 @@ do_test (void)
   CHECK_CPU_FEATURE_USABLE (XFD);
   CHECK_CPU_FEATURE_USABLE (INVARIANT_TSC);
   CHECK_CPU_FEATURE_USABLE (WBNOINVD);
+  CHECK_CPU_FEATURE_USABLE (AVX_VNNI);
   CHECK_CPU_FEATURE_USABLE (AVX512_BF16);
   CHECK_CPU_FEATURE_USABLE (AESKLE);
   CHECK_CPU_FEATURE_USABLE (WIDE_KL);
-- 
2.26.2


  parent reply	other threads:[~2020-10-08 16:12 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-08 16:12 [PATCH 0/5] Update <sys/platform/x86.h> for ISE revision 041 H.J. Lu via Libc-alpha
2020-10-08 16:12 ` [PATCH 1/5] <sys/platform/x86.h>: Add Intel UINTR support H.J. Lu via Libc-alpha
2020-10-08 16:12 ` [PATCH 2/5] <sys/platform/x86.h>: Add AVX512_FP16 support H.J. Lu via Libc-alpha
2020-10-08 16:12 ` H.J. Lu via Libc-alpha [this message]
2020-10-08 16:12 ` [PATCH 4/5] <sys/platform/x86.h>: Add Intel HRESET support H.J. Lu via Libc-alpha
2020-10-08 16:12 ` [PATCH 5/5] <sys/platform/x86.h>: Add FSRCS/FSRS/FZLRM support H.J. Lu via Libc-alpha
2020-10-09 16:49 ` [PATCH 0/5] Update <sys/platform/x86.h> for ISE revision 041 H.J. Lu via Libc-alpha

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