From: DJ Delorie <dj@redhat.com>
To: Szabolcs Nagy <szabolcs.nagy@arm.com>
Cc: libc-alpha@sourceware.org, nd@arm.com
Subject: Re: riscv: fmax/fmin sNaN fix
Date: Tue, 20 Feb 2018 12:12:30 -0500 [thread overview]
Message-ID: <xnh8qbk2kh.fsf@greed.delorie.com> (raw)
In-Reply-To: <b680364d-83ef-48ba-1885-71e50ccc4845@arm.com> (message from Szabolcs Nagy on Tue, 20 Feb 2018 10:26:01 +0000)
Szabolcs Nagy <szabolcs.nagy@arm.com> writes:
> On 20/02/18 02:57, DJ Delorie wrote:
>>
>> RISC-V's FPU follows the IEEE spec, not the POSIX spec. This patch
> ^^^^^^^^^
> which one?
> (the next ieee revision will have different min/max operations)
The one that doesn't match POSIX :-)
The RISC-V fpu does this:
fmax (sNAN,4) -> 4
GLIBC expects this:
fmax (sNAN,4) -> qNAN
(hmm... maybe it follows posix, not ieee... whatever, it doesn't do what
glibc expects)
Note that the RISC-V ISA spec 2.2 documents the sNAN->qNAN behavior,
there's a patch for 2.3 that corrects it to match actual hardware.
next prev parent reply other threads:[~2018-02-20 17:10 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-20 2:57 riscv: fmax/fmin sNaN fix DJ Delorie
2018-02-20 10:26 ` Szabolcs Nagy
2018-02-20 17:12 ` DJ Delorie [this message]
2018-02-20 17:22 ` DJ Delorie
2018-02-21 10:44 ` Szabolcs Nagy
2018-02-21 17:25 ` DJ Delorie
2018-02-21 23:24 ` Carlos O'Donell
2018-02-22 0:24 ` DJ Delorie
2018-02-22 20:28 ` Carlos O'Donell
2018-02-22 20:34 ` DJ Delorie
2018-02-22 20:42 ` Joseph Myers
2018-02-22 20:50 ` Joseph Myers
2018-02-23 1:58 ` DJ Delorie
2018-02-23 2:01 ` Joseph Myers
2018-02-23 2:08 ` DJ Delorie
2018-02-20 22:03 ` Richard Henderson
2018-02-20 23:11 ` Joseph Myers
2018-02-21 21:25 ` Palmer Dabbelt
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