From: "naohirot@fujitsu.com" <naohirot@fujitsu.com>
To: 'Szabolcs Nagy' <szabolcs.nagy@arm.com>
Cc: "libc-alpha@sourceware.org" <libc-alpha@sourceware.org>
Subject: RE: [PATCH 2/5] aarch64: Added optimized memcpy and memmove for A64FX
Date: Tue, 30 Mar 2021 07:17:37 +0000 [thread overview]
Message-ID: <TYAPR01MB602584DF4BCDA1977D3BFC14DF7D9@TYAPR01MB6025.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <20210329124436.GE23289@arm.com>
Szabolcs-san,
Thank you for your review.
> > /* Maximum number of IFUNC implementations. */
> > -#define MAX_IFUNC 4
> > +#if HAVE_SVE_ASM_SUPPORT
> > +# define MAX_IFUNC 7
> > +#else
> > +# define MAX_IFUNC 6
> > +#endif
>
> hm this MAX_IFUNC looks a bit problematic: currently its only use is to detect if a
> target requires more ifuncs than the array passed to __libc_ifunc_impl_list, but for
> that ideally it would be automatic, not manually maintained.
>
> i would just define it to 7 unconditionally (the maximum over valid configurations).
OK, I'll fix it to 7 unconditionally.
> > cores diff --git a/sysdeps/aarch64/multiarch/init-arch.h
> > b/sysdeps/aarch64/multiarch/init-arch.h
> > index a167699e74..d20e7e1b8e 100644
> > --- a/sysdeps/aarch64/multiarch/init-arch.h
> > +++ b/sysdeps/aarch64/multiarch/init-arch.h
> > @@ -33,4 +33,6 @@
> > bool __attribute__((unused)) bti =
> \
> > HAVE_AARCH64_BTI && GLRO(dl_aarch64_cpu_features).bti;
> \
> > bool __attribute__((unused)) mte =
> \
> > - MTE_ENABLED ();
> > + MTE_ENABLED ();
> \
> > + unsigned __attribute__((unused)) sve =
> \
> > + GLRO(dl_aarch64_cpu_features).sve;
>
> i would use bool here.
I'll fix it to the bool.
> > --- /dev/null
> > +++ b/sysdeps/aarch64/multiarch/memcpy_a64fx.S
>
> skipping this.
I wait for your review.
Thanks.
Naohiro
next prev parent reply other threads:[~2021-03-30 7:17 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-17 2:28 [PATCH 0/5] Added optimized memcpy/memmove/memset for A64FX Naohiro Tamura
2021-03-17 2:33 ` [PATCH 1/5] config: Added HAVE_SVE_ASM_SUPPORT for aarch64 Naohiro Tamura
2021-03-29 12:11 ` Szabolcs Nagy via Libc-alpha
2021-03-30 6:19 ` naohirot
2021-03-17 2:34 ` [PATCH 2/5] aarch64: Added optimized memcpy and memmove for A64FX Naohiro Tamura
2021-03-29 12:44 ` Szabolcs Nagy via Libc-alpha
2021-03-30 7:17 ` naohirot [this message]
2021-03-17 2:34 ` [PATCH 3/5] aarch64: Added optimized memset " Naohiro Tamura
2021-03-17 2:35 ` [PATCH 4/5] scripts: Added Vector Length Set test helper script Naohiro Tamura
2021-03-29 13:20 ` Szabolcs Nagy via Libc-alpha
2021-03-30 7:25 ` naohirot
2021-03-17 2:35 ` [PATCH 5/5] benchtests: Added generic_memcpy and generic_memmove to large benchtests Naohiro Tamura
2021-03-29 12:03 ` [PATCH 0/5] Added optimized memcpy/memmove/memset for A64FX Szabolcs Nagy via Libc-alpha
2021-05-10 1:45 ` naohirot
2021-05-14 13:35 ` Szabolcs Nagy via Libc-alpha
2021-05-19 0:11 ` naohirot
2021-05-12 9:23 ` [PATCH v2 0/6] aarch64: " Naohiro Tamura
2021-05-12 9:26 ` [PATCH v2 1/6] config: Added HAVE_AARCH64_SVE_ASM for aarch64 Naohiro Tamura
2021-05-26 10:05 ` Szabolcs Nagy via Libc-alpha
2021-05-12 9:27 ` [PATCH v2 2/6] aarch64: define BTI_C and BTI_J macros as NOP unless HAVE_AARCH64_BTI Naohiro Tamura
2021-05-26 10:06 ` Szabolcs Nagy via Libc-alpha
2021-05-12 9:28 ` [PATCH v2 3/6] aarch64: Added optimized memcpy and memmove for A64FX Naohiro Tamura
2021-05-26 10:19 ` Szabolcs Nagy via Libc-alpha
2021-05-12 9:28 ` [PATCH v2 4/6] aarch64: Added optimized memset " Naohiro Tamura
2021-05-26 10:22 ` Szabolcs Nagy via Libc-alpha
2021-05-12 9:29 ` [PATCH v2 5/6] scripts: Added Vector Length Set test helper script Naohiro Tamura
2021-05-12 16:58 ` Joseph Myers
2021-05-13 9:53 ` naohirot
2021-05-20 7:34 ` Naohiro Tamura
2021-05-26 10:24 ` Szabolcs Nagy via Libc-alpha
2021-05-12 9:29 ` [PATCH v2 6/6] benchtests: Fixed bench-memcpy-random: buf1: mprotect failed Naohiro Tamura
2021-05-26 10:25 ` Szabolcs Nagy via Libc-alpha
2021-05-27 0:22 ` [PATCH v2 0/6] aarch64: Added optimized memcpy/memmove/memset for A64FX naohirot
2021-05-27 23:50 ` naohirot
2021-05-27 7:42 ` [PATCH v3 1/2] aarch64: Added optimized memcpy and memmove " Naohiro Tamura
2021-05-27 7:44 ` [PATCH v3 2/2] aarch64: Added optimized memset " Naohiro Tamura
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
List information: https://www.gnu.org/software/libc/involved.html
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=TYAPR01MB602584DF4BCDA1977D3BFC14DF7D9@TYAPR01MB6025.jpnprd01.prod.outlook.com \
--to=naohirot@fujitsu.com \
--cc=libc-alpha@sourceware.org \
--cc=szabolcs.nagy@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).