From: Alistair Francis via Libc-alpha <libc-alpha@sourceware.org>
To: libc-alpha@sourceware.org
Cc: macro@wdc.com, alistair.francis@wdc.com
Subject: [PATCH v4 09/18] RISC-V: Support the 32-bit ABI implementation
Date: Wed, 12 Aug 2020 07:41:19 -0700 [thread overview]
Message-ID: <d3c7f58d186b2b91bd9e0213e4d5a0f9df2fa100.1597243100.git.alistair.francis@wdc.com> (raw)
In-Reply-To: <cover.1597243100.git.alistair.francis@wdc.com>
This patch adds the ABI implementation for 32-bit RISC-V. It contains
the Linux-specific and RISC-V architecture code.
---
sysdeps/riscv/bits/wordsize.h | 9 +--
sysdeps/riscv/nptl/bits/pthreadtypes-arch.h | 26 +++++----
sysdeps/riscv/nptl/bits/struct_rwlock.h | 27 ++++++++-
sysdeps/riscv/nptl/pthread-offsets.h | 17 +++++-
sysdeps/riscv/sfp-machine.h | 27 ++++++++-
sysdeps/riscv/sys/asm.h | 7 ++-
.../unix/sysv/linux/riscv/jmp_buf-macros.h | 55 +++++++++++++++++++
7 files changed, 146 insertions(+), 22 deletions(-)
create mode 100644 sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h
diff --git a/sysdeps/riscv/bits/wordsize.h b/sysdeps/riscv/bits/wordsize.h
index faccc71828..4929dcf873 100644
--- a/sysdeps/riscv/bits/wordsize.h
+++ b/sysdeps/riscv/bits/wordsize.h
@@ -22,8 +22,9 @@
# error unsupported ABI
#endif
-#if __riscv_xlen == 64
-# define __WORDSIZE_TIME64_COMPAT32 1
-#else
-# error "rv32i-based targets are not supported"
+#define __WORDSIZE_TIME64_COMPAT32 1
+
+#if __WORDSIZE == 32
+# define __WORDSIZE32_SIZE_ULONG 0
+# define __WORDSIZE32_PTRDIFF_LONG 0
#endif
diff --git a/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h b/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h
index c3c72d6c10..8a602e864a 100644
--- a/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h
+++ b/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h
@@ -21,18 +21,22 @@
#include <bits/endian.h>
-#if __riscv_xlen == 64
-# define __SIZEOF_PTHREAD_ATTR_T 56
-# define __SIZEOF_PTHREAD_MUTEX_T 40
-# define __SIZEOF_PTHREAD_MUTEXATTR_T 4
-# define __SIZEOF_PTHREAD_COND_T 48
-# define __SIZEOF_PTHREAD_CONDATTR_T 4
-# define __SIZEOF_PTHREAD_RWLOCK_T 56
-# define __SIZEOF_PTHREAD_RWLOCKATTR_T 8
-# define __SIZEOF_PTHREAD_BARRIER_T 32
-# define __SIZEOF_PTHREAD_BARRIERATTR_T 4
+#define __SIZEOF_PTHREAD_MUTEXATTR_T 4
+#define __SIZEOF_PTHREAD_COND_T 48
+#define __SIZEOF_PTHREAD_CONDATTR_T 4
+#define __SIZEOF_PTHREAD_RWLOCKATTR_T 8
+#define __SIZEOF_PTHREAD_BARRIERATTR_T 4
+
+#if __WORDSIZE == 64
+# define __SIZEOF_PTHREAD_ATTR_T 56
+# define __SIZEOF_PTHREAD_MUTEX_T 40
+# define __SIZEOF_PTHREAD_RWLOCK_T 56
+# define __SIZEOF_PTHREAD_BARRIER_T 32
#else
-# error "rv32i-based systems are not supported"
+# define __SIZEOF_PTHREAD_ATTR_T 32
+# define __SIZEOF_PTHREAD_MUTEX_T 32
+# define __SIZEOF_PTHREAD_RWLOCK_T 48
+# define __SIZEOF_PTHREAD_BARRIER_T 20
#endif
#define __LOCK_ALIGNMENT
diff --git a/sysdeps/riscv/nptl/bits/struct_rwlock.h b/sysdeps/riscv/nptl/bits/struct_rwlock.h
index acfaa75e1b..dc467d42c7 100644
--- a/sysdeps/riscv/nptl/bits/struct_rwlock.h
+++ b/sysdeps/riscv/nptl/bits/struct_rwlock.h
@@ -15,7 +15,7 @@
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
+ <https://www.gnu.org/licenses/>. */
#ifndef _RWLOCK_INTERNAL_H
#define _RWLOCK_INTERNAL_H
@@ -32,14 +32,37 @@ struct __pthread_rwlock_arch_t
unsigned int __writers_futex;
unsigned int __pad3;
unsigned int __pad4;
+#if __WORDSIZE == 64
int __cur_writer;
int __shared;
unsigned long int __pad1;
unsigned long int __pad2;
unsigned int __flags;
+#else
+# if __BYTE_ORDER == __BIG_ENDIAN
+ unsigned char __pad1;
+ unsigned char __pad2;
+ unsigned char __shared;
+ unsigned char __flags;
+# else
+ unsigned char __flags;
+ unsigned char __shared;
+ unsigned char __pad1;
+ unsigned char __pad2;
+# endif
+ int __cur_writer;
+#endif
};
-#define __PTHREAD_RWLOCK_INITIALIZER(__flags) \
+#if __WORDSIZE == 64
+# define __PTHREAD_RWLOCK_INITIALIZER(__flags) \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, __flags
+#elif __BYTE_ORDER == __BIG_ENDIAN
+# define __PTHREAD_RWLOCK_INITIALIZER(__flags) \
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, __flags, 0
+#else
+# define __PTHREAD_RWLOCK_INITIALIZER(__flags) \
+ 0, 0, 0, 0, 0, 0, __flags, 0, 0, 0, 0
+#endif
#endif
diff --git a/sysdeps/riscv/nptl/pthread-offsets.h b/sysdeps/riscv/nptl/pthread-offsets.h
index 31f0587bec..eea689d4d6 100644
--- a/sysdeps/riscv/nptl/pthread-offsets.h
+++ b/sysdeps/riscv/nptl/pthread-offsets.h
@@ -1,3 +1,16 @@
-#define __PTHREAD_MUTEX_KIND_OFFSET 16
+#if __WORDSIZE == 64
+# define __PTHREAD_MUTEX_KIND_OFFSET 16
+#else
+# define __PTHREAD_MUTEX_KIND_OFFSET 12
+#endif
-#define __PTHREAD_RWLOCK_FLAGS_OFFSET 48
+
+#if __WORDSIZE == 64
+# define __PTHREAD_RWLOCK_FLAGS_OFFSET 48
+#else
+# if __BYTE_ORDER == __BIG_ENDIAN
+# define __PTHREAD_RWLOCK_FLAGS_OFFSET 27
+# else
+# define __PTHREAD_RWLOCK_FLAGS_OFFSET 24
+# endif
+#endif
diff --git a/sysdeps/riscv/sfp-machine.h b/sysdeps/riscv/sfp-machine.h
index 08a84fd701..bbeb9b37cf 100644
--- a/sysdeps/riscv/sfp-machine.h
+++ b/sysdeps/riscv/sfp-machine.h
@@ -22,7 +22,32 @@
#if __riscv_xlen == 32
-# error "rv32i-based targets are not supported"
+# define _FP_W_TYPE_SIZE 32
+# define _FP_W_TYPE unsigned long
+# define _FP_WS_TYPE signed long
+# define _FP_I_TYPE long
+
+# define _FP_MUL_MEAT_S(R, X, Y) \
+ _FP_MUL_MEAT_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm)
+# define _FP_MUL_MEAT_D(R, X, Y) \
+ _FP_MUL_MEAT_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm)
+# define _FP_MUL_MEAT_Q(R, X, Y) \
+ _FP_MUL_MEAT_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm)
+
+# define _FP_MUL_MEAT_DW_S(R, X, Y) \
+ _FP_MUL_MEAT_DW_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm)
+# define _FP_MUL_MEAT_DW_D(R, X, Y) \
+ _FP_MUL_MEAT_DW_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm)
+# define _FP_MUL_MEAT_DW_Q(R, X, Y) \
+ _FP_MUL_MEAT_DW_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm)
+
+# define _FP_DIV_MEAT_S(R, X, Y) _FP_DIV_MEAT_1_udiv_norm (S, R, X, Y)
+# define _FP_DIV_MEAT_D(R, X, Y) _FP_DIV_MEAT_2_udiv (D, R, X, Y)
+# define _FP_DIV_MEAT_Q(R, X, Y) _FP_DIV_MEAT_4_udiv (Q, R, X, Y)
+
+# define _FP_NANFRAC_S _FP_QNANBIT_S
+# define _FP_NANFRAC_D _FP_QNANBIT_D, 0
+# define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0
#else
diff --git a/sysdeps/riscv/sys/asm.h b/sysdeps/riscv/sys/asm.h
index bd2de17e17..8292ec77b0 100644
--- a/sysdeps/riscv/sys/asm.h
+++ b/sysdeps/riscv/sys/asm.h
@@ -22,11 +22,14 @@
/* Macros to handle different pointer/register sizes for 32/64-bit code. */
#if __riscv_xlen == 64
# define PTRLOG 3
-# define SZREG 8
+# define SZREG 8
# define REG_S sd
# define REG_L ld
#elif __riscv_xlen == 32
-# error "rv32i-based targets are not supported"
+# define PTRLOG 2
+# define SZREG 4
+# define REG_S sw
+# define REG_L lw
#else
# error __riscv_xlen must equal 32 or 64
#endif
diff --git a/sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h b/sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h
new file mode 100644
index 0000000000..234b979a8c
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h
@@ -0,0 +1,55 @@
+/* The jump buffer constants for RISC-V.
+ Copyright (C) 2020 Free Software Foundation, Inc.
+
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <https://www.gnu.org/licenses/>. */
+
+/* Produced by this program:
+
+ #include <stdio.h>
+ #include <unistd.h>
+ #include <setjmp.h>
+ #include <stddef.h>
+
+ int main (int argc, char **argv)
+ {
+ printf ("#define JMP_BUF_SIZE %d\n", sizeof (jmp_buf));
+ printf ("#define JMP_BUF_ALIGN %d\n", __alignof__ (jmp_buf));
+ printf ("#define SIGJMP_BUF_SIZE %d\n", sizeof (sigjmp_buf));
+ printf ("#define SIGJMP_BUF_ALIGN %d\n", __alignof__ (sigjmp_buf));
+ printf ("#define MASK_WAS_SAVED_OFFSET %d\n",
+ offsetof (struct __jmp_buf_tag, __mask_was_saved));
+ printf ("#define SAVED_MASK_OFFSET %d\n",
+ offsetof (struct __jmp_buf_tag, __saved_mask));
+ } */
+
+#if defined __riscv_float_abi_soft
+# define JMP_BUF_SIZE 188
+# define JMP_BUF_ALIGN 4
+# define SIGJMP_BUF_SIZE 188
+# define SIGJMP_BUF_ALIGN 4
+# define MASK_WAS_SAVED_OFFSET 56
+# define SAVED_MASK_OFFSET 60
+#elif defined __riscv_float_abi_double
+# define JMP_BUF_SIZE 288
+# define JMP_BUF_ALIGN 8
+# define SIGJMP_BUF_SIZE 288
+# define SIGJMP_BUF_ALIGN 8
+# define MASK_WAS_SAVED_OFFSET 152
+# define SAVED_MASK_OFFSET 156
+#else
+# error "Unknown RISC-V floating-point ABI"
+#endif
--
2.27.0
next prev parent reply other threads:[~2020-08-12 14:51 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-12 14:40 [PATCH v4 00/18] glibc port for 32-bit RISC-V (RV32) Alistair Francis via Libc-alpha
2020-08-12 14:40 ` [PATCH v4 01/18] RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 Alistair Francis via Libc-alpha
2020-08-12 14:40 ` [PATCH v4 02/18] RISC-V: Cleanup some of the sysdep.h code Alistair Francis via Libc-alpha
2020-08-17 13:53 ` Maciej W. Rozycki via Libc-alpha
2020-08-18 17:37 ` Carlos O'Donell via Libc-alpha
2020-08-21 17:13 ` Maciej W. Rozycki via Libc-alpha
2020-08-12 14:40 ` [PATCH v4 03/18] RISC-V: Use 64-bit-time syscall numbers with the 32-bit port Alistair Francis via Libc-alpha
2020-08-17 14:07 ` Maciej W. Rozycki via Libc-alpha
2020-08-12 14:40 ` [PATCH v4 04/18] RISC-V: Add support for 32-bit vDSO calls Alistair Francis via Libc-alpha
2020-08-17 14:10 ` Maciej W. Rozycki via Libc-alpha
2020-08-18 1:35 ` Kito Cheng via Libc-alpha
2020-08-12 14:41 ` [PATCH v4 05/18] RISC-V: Support dynamic loader for the 32-bit Alistair Francis via Libc-alpha
2020-08-12 14:41 ` [PATCH v4 07/18] sysv/linux: riscv: Fix dl-cache.h indentation Alistair Francis via Libc-alpha
2020-08-17 14:21 ` Maciej W. Rozycki via Libc-alpha
2020-08-12 14:41 ` [PATCH v4 08/18] RISC-V: Add arch-syscall.h for RV32 Alistair Francis via Libc-alpha
2020-08-12 17:38 ` Joseph Myers
2020-08-12 18:14 ` Alistair Francis via Libc-alpha
2020-08-12 14:41 ` Alistair Francis via Libc-alpha [this message]
2020-08-18 13:35 ` [PATCH v4 09/18] RISC-V: Support the 32-bit ABI implementation Maciej W. Rozycki via Libc-alpha
2020-08-12 14:41 ` [PATCH v4 10/18] RISC-V: Hard float support for 32-bit Alistair Francis via Libc-alpha
2020-08-18 14:37 ` Maciej W. Rozycki via Libc-alpha
2020-08-12 14:41 ` [PATCH v4 11/18] RISC-V: Add 32-bit ABI lists Alistair Francis via Libc-alpha
2020-08-18 14:42 ` Maciej W. Rozycki via Libc-alpha
2020-08-12 14:41 ` [PATCH v4 12/18] RISC-V: Add the RV32 libm-test-ulps Alistair Francis via Libc-alpha
2020-08-18 15:06 ` Maciej W. Rozycki via Libc-alpha
2020-08-18 15:02 ` Alistair Francis via Libc-alpha
2020-08-12 14:41 ` [PATCH v4 13/18] RISC-V: Fix llrint and llround missing exceptions on RV32 Alistair Francis via Libc-alpha
2020-08-18 15:09 ` Maciej W. Rozycki via Libc-alpha
2020-08-12 14:41 ` [PATCH v4 14/18] riscv32: Specify the arch_minimum_kernel as 5.4 Alistair Francis via Libc-alpha
2020-08-18 16:43 ` Maciej W. Rozycki via Libc-alpha
2020-08-12 14:41 ` [PATCH v4 16/18] RISC-V: Add rv32 path to RTLDLIST in ldd Alistair Francis via Libc-alpha
2020-08-18 23:52 ` Maciej W. Rozycki via Libc-alpha
2020-08-12 14:42 ` [PATCH v4 17/18] Documentation for the RISC-V 32-bit port Alistair Francis via Libc-alpha
2020-08-18 23:59 ` Maciej W. Rozycki via Libc-alpha
2020-08-12 14:42 ` [PATCH v4 18/18] Add RISC-V 32-bit target to build-many-glibcs.py Alistair Francis via Libc-alpha
2020-08-19 0:00 ` Maciej W. Rozycki via Libc-alpha
2020-08-12 17:37 ` [PATCH v4 00/18] glibc port for 32-bit RISC-V (RV32) Joseph Myers
2020-08-13 14:59 ` Alistair Francis via Libc-alpha
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