From: Joseph Myers <joseph@codesourcery.com>
To: "Maciej W. Rozycki" <macro@wdc.com>
Cc: libc-alpha@sourceware.org,
Alistair Francis <alistair.francis@wdc.com>,
Andrew Waterman <andrew@sifive.com>
Subject: Re: [PATCH v3 13/19] RISC-V: Add the RV32 libm-test-ulps
Date: Tue, 14 Jul 2020 17:24:05 +0000 [thread overview]
Message-ID: <alpine.DEB.2.21.2007141721110.29537@digraph.polyomino.org.uk> (raw)
In-Reply-To: <alpine.LFD.2.21.2007140042570.24175@redsun52.ssa.fujisawa.hgst.com>
On Tue, 14 Jul 2020, Maciej W. Rozycki via Libc-alpha wrote:
> Well, yes. I just ran `make regen-ulps' consecutively with different
> `test-wrapper*' variables each time so as to redirect execution either to
> my HiFive Unleashed board or (user-mode) QEMU. I have double-checked the
> logs now and no rebuild was made for subsequent runs, so the very same
> executables and DSOs were used.
So picking one function and setting its ulps back to the lower value, then
rerunning the test on whichever of hardware and QEMU gave the higher
value, should result in a test log showing a specific input to a specific
function (in a specific rounding mode) for which the results on hardware
and QEMU differ. After confirming the difference with a minimal test just
making that one function call, it should be possible to trace the
execution of the function, whether in a debugger or inserting printf
calls, to find the exact instruction for which hardware and QEMU produce
different results with the same inputs.
--
Joseph S. Myers
joseph@codesourcery.com
next prev parent reply other threads:[~2020-07-14 17:24 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-12 15:47 [PATCH v3 00/19] glibc port for 32-bit RISC-V (RV32) Alistair Francis via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 01/19] RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 Alistair Francis via Libc-alpha
2020-07-15 17:29 ` Maciej W. Rozycki via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 02/19] RISC-V: Cleanup some of the sysdep.h code Alistair Francis via Libc-alpha
2020-07-16 1:07 ` Maciej W. Rozycki via Libc-alpha
2020-08-10 15:16 ` Alistair Francis via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 03/19] RISC-V: Use 64-bit-time syscall numbers with the 32-bit port Alistair Francis via Libc-alpha
2020-07-16 1:58 ` Maciej W. Rozycki via Libc-alpha
2020-08-10 15:15 ` Alistair Francis via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 04/19] RISC-V: Add support for 32-bit vDSO calls Alistair Francis via Libc-alpha
2020-07-16 0:12 ` Maciej W. Rozycki via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 05/19] RISC-V: Support dynamic loader for the 32-bit Alistair Francis via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 06/19] sysv/linux: riscv: Fix dl-cache.h indentation Alistair Francis via Libc-alpha
2020-07-16 6:31 ` Maciej W. Rozycki via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 07/19] RISC-V: Add path of library directories for the 32-bit Alistair Francis via Libc-alpha
2020-07-16 7:03 ` Maciej W. Rozycki via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 08/19] RISC-V: Add arch-syscall.h for RV32 Alistair Francis via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 09/19] RISC-V: nptl: update default pthread-offsets.h Alistair Francis via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 10/19] RISC-V: Support the 32-bit ABI implementation Alistair Francis via Libc-alpha
2020-07-16 8:23 ` Maciej W. Rozycki via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 11/19] RISC-V: Hard float support for 32-bit Alistair Francis via Libc-alpha
2020-07-16 8:27 ` Maciej W. Rozycki via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 12/19] RISC-V: Add ABI lists Alistair Francis via Libc-alpha
2020-07-12 15:47 ` [PATCH v3 13/19] RISC-V: Add the RV32 libm-test-ulps Alistair Francis via Libc-alpha
2020-07-13 17:14 ` Maciej W. Rozycki via Libc-alpha
2020-07-13 17:32 ` Alistair Francis via Libc-alpha
2020-07-13 19:19 ` Maciej W. Rozycki via Libc-alpha
2020-07-13 19:38 ` Carlos O'Donell via Libc-alpha
2020-07-30 23:11 ` [PATCH] RISC-V: Update lp64d libm-test-ulps according to HiFive Unleashed Maciej W. Rozycki via Libc-alpha
2020-08-03 17:52 ` Carlos O'Donell via Libc-alpha
2020-08-04 12:01 ` Maciej W. Rozycki via Libc-alpha
2020-07-13 21:26 ` [PATCH v3 13/19] RISC-V: Add the RV32 libm-test-ulps Joseph Myers
2020-07-13 21:30 ` Carlos O'Donell via Libc-alpha
2020-07-13 21:59 ` Joseph Myers
2020-07-13 22:26 ` Andrew Waterman
2020-07-14 0:00 ` Maciej W. Rozycki via Libc-alpha
2020-07-14 17:24 ` Joseph Myers [this message]
2020-07-12 15:47 ` [PATCH v3 14/19] RISC-V: Fix llrint and llround missing exceptions on RV32 Alistair Francis via Libc-alpha
2020-07-14 22:13 ` Maciej W. Rozycki via Libc-alpha
2020-07-22 16:30 ` Alistair Francis via Libc-alpha
2020-07-12 15:48 ` [PATCH v3 15/19] RISC-V: Build Infastructure for 32-bit Alistair Francis via Libc-alpha
2020-07-14 23:55 ` Maciej W. Rozycki via Libc-alpha
2020-08-10 15:45 ` Alistair Francis via Libc-alpha
2020-07-12 15:48 ` [PATCH v3 16/19] riscv32: Specify the arch_minimum_kernel as 5.4 Alistair Francis via Libc-alpha
2020-07-15 0:06 ` Maciej W. Rozycki via Libc-alpha
2020-07-16 1:34 ` Maciej W. Rozycki via Libc-alpha
2020-07-12 15:48 ` [PATCH v3 17/19] RISC-V: Add rv32 path to RTLDLIST in ldd Alistair Francis via Libc-alpha
2020-07-15 0:32 ` Maciej W. Rozycki via Libc-alpha
2020-08-10 20:04 ` Alistair Francis via Libc-alpha
2020-07-12 15:48 ` [PATCH v3 18/19] Documentation for the RISC-V 32-bit port Alistair Francis via Libc-alpha
2020-07-13 17:17 ` Adhemerval Zanella via Libc-alpha
2020-07-14 13:28 ` Alistair Francis via Libc-alpha
2020-07-15 0:53 ` Maciej W. Rozycki via Libc-alpha
2020-07-22 16:33 ` Alistair Francis via Libc-alpha
2020-07-12 15:48 ` [PATCH v3 19/19] Add RISC-V 32-bit target to build-many-glibcs.py Alistair Francis via Libc-alpha
2020-07-15 1:16 ` Maciej W. Rozycki via Libc-alpha
2020-07-13 21:15 ` [PATCH v3 00/19] glibc port for 32-bit RISC-V (RV32) Joseph Myers
2020-07-14 13:18 ` Alistair Francis via Libc-alpha
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