* [PATCH 0/2] ARC fixes/updates
@ 2021-07-20 20:57 Vineet Gupta via Libc-alpha
2021-07-20 20:57 ` [PATCH 1/2] ARC: fp: (micro)optimize FPU_STATUS read by eliding FWE bit clearing Vineet Gupta via Libc-alpha
2021-07-20 20:58 ` [PATCH 2/2] ARC: elf: make type safe Vineet Gupta via Libc-alpha
0 siblings, 2 replies; 5+ messages in thread
From: Vineet Gupta via Libc-alpha @ 2021-07-20 20:57 UTC (permalink / raw)
To: libc-alpha; +Cc: Vineet Gupta, linux-snps-arc
Hi,
A couple of updates for ARC.
Thx,
-Vineet
Vineet Gupta (2):
ARC: fp: (micro)optimize FPU_STATUS read by eliding FWE bit clearing
ARC: elf: make type safe
sysdeps/arc/dl-machine.h | 23 ++++++++++-------------
sysdeps/arc/fpu_control.h | 15 +++++++--------
2 files changed, 17 insertions(+), 21 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] ARC: fp: (micro)optimize FPU_STATUS read by eliding FWE bit clearing
2021-07-20 20:57 [PATCH 0/2] ARC fixes/updates Vineet Gupta via Libc-alpha
@ 2021-07-20 20:57 ` Vineet Gupta via Libc-alpha
2021-07-21 20:16 ` Vineet Gupta via Libc-alpha
2021-07-20 20:58 ` [PATCH 2/2] ARC: elf: make type safe Vineet Gupta via Libc-alpha
1 sibling, 1 reply; 5+ messages in thread
From: Vineet Gupta via Libc-alpha @ 2021-07-20 20:57 UTC (permalink / raw)
To: libc-alpha; +Cc: Vineet Gupta, linux-snps-arc
Any FPU_STATUS write needs setting the FWE bit (31) whcih just provides
a "control signal" to enable explicit write (vs. the side-effect of FPU
instructions). However this bit is RAZ and write-only, thus effectively
never stored in FPU_STATUS register. Thus when reading the register
there is no need to clear it. This shaves off a BCLR instruction from
the fe*exceptino family of functions and while no big deal still makes
sense to do.
This came up when debugging a race in math/test-fenv-tls [1]
[1]: https://github.com/foss-for-synopsys-dwc-arc-processors/linux/issues/54
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
sysdeps/arc/fpu_control.h | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/sysdeps/arc/fpu_control.h b/sysdeps/arc/fpu_control.h
index c7d101e7838f..ae4348321c16 100644
--- a/sysdeps/arc/fpu_control.h
+++ b/sysdeps/arc/fpu_control.h
@@ -81,21 +81,20 @@ typedef unsigned int fpu_control_t;
# define _FPU_SETCW(cw) __asm__ volatile ("sr %0, [0x300]" : : "r" (cw))
/* Macros for accessing the hardware status word.
- FWE bit is special as it controls if actual status bits could be wrritten
- explicitly (other than FPU instructions). We handle it here to keep the
- callers agnostic of it:
- - clear it out when reporting status bits
- - always set it when changing status bits. */
+ Writing to FPU_STATUS requires a "control" bit FWE to be able to set the
+ exception flags directly (as opposed to side-effects of FP instructions).
+ That is done in the macro here to keeps callers agnostic of this detail.
+ And given FWE is write-only and RAZ, no need to "clear" it in _FPU_GETS
+ macro. */
# define _FPU_GETS(cw) \
__asm__ volatile ("lr %0, [0x301] \r\n" \
- "bclr %0, %0, 31 \r\n" \
: "=r" (cw))
# define _FPU_SETS(cw) \
do { \
- unsigned int __tmp = 0x80000000 | (cw); \
+ unsigned int __fwe = 0x80000000 | (cw); \
__asm__ volatile ("sr %0, [0x301] \r\n" \
- : : "r" (__tmp)); \
+ : : "r" (__fwe)); \
} while (0)
/* Default control word set at startup. */
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] ARC: elf: make type safe
2021-07-20 20:57 [PATCH 0/2] ARC fixes/updates Vineet Gupta via Libc-alpha
2021-07-20 20:57 ` [PATCH 1/2] ARC: fp: (micro)optimize FPU_STATUS read by eliding FWE bit clearing Vineet Gupta via Libc-alpha
@ 2021-07-20 20:58 ` Vineet Gupta via Libc-alpha
2021-07-21 20:17 ` Vineet Gupta via Libc-alpha
1 sibling, 1 reply; 5+ messages in thread
From: Vineet Gupta via Libc-alpha @ 2021-07-20 20:58 UTC (permalink / raw)
To: libc-alpha; +Cc: Vineet Gupta, linux-snps-arc
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
sysdeps/arc/dl-machine.h | 23 ++++++++++-------------
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/sysdeps/arc/dl-machine.h b/sysdeps/arc/dl-machine.h
index 60b49af0d5ca..e6ce7f0ff6d9 100644
--- a/sysdeps/arc/dl-machine.h
+++ b/sysdeps/arc/dl-machine.h
@@ -86,7 +86,7 @@
/* Return nonzero iff ELF header is compatible with the running host. */
static inline int
-elf_machine_matches_host (const Elf32_Ehdr *ehdr)
+elf_machine_matches_host (const ElfW(Ehdr) *ehdr)
{
return (ehdr->e_machine == EM_ARCV2 /* ARC HS. */
|| ehdr->e_machine == EM_ARC_COMPACT); /* ARC 700. */
@@ -124,7 +124,7 @@ static inline int
__attribute__ ((always_inline))
elf_machine_runtime_setup (struct link_map *l, int lazy, int profile)
{
- extern void _dl_runtime_resolve (Elf32_Word);
+ extern void _dl_runtime_resolve (void);
if (l->l_info[DT_JMPREL] && lazy)
{
@@ -202,7 +202,7 @@ __start: \n\
/* A reloc type used for ld.so cmdline arg lookups to reject PLT entries. */
#define ELF_MACHINE_JMP_SLOT R_ARC_JUMP_SLOT
-/* ARC uses Elf32_Rela relocations. */
+/* ARC uses Rela relocations. */
#define ELF_MACHINE_NO_REL 1
#define ELF_MACHINE_NO_RELA 0
@@ -211,19 +211,14 @@ __start: \n\
static inline ElfW(Addr)
elf_machine_fixup_plt (struct link_map *map, lookup_t t,
const ElfW(Sym) *refsym, const ElfW(Sym) *sym,
- const Elf32_Rela *reloc,
+ const ElfW(Rela) *reloc,
ElfW(Addr) *reloc_addr, ElfW(Addr) value)
{
return *reloc_addr = value;
}
/* Return the final value of a plt relocation. */
-static inline ElfW(Addr)
-elf_machine_plt_value (struct link_map *map, const Elf32_Rela *reloc,
- ElfW(Addr) value)
-{
- return value;
-}
+#define elf_machine_plt_value(map, reloc, value) (value)
/* Names of the architecture-specific auditing callback functions. */
#define ARCH_LA_PLTENTER arc_gnu_pltenter
@@ -239,8 +234,9 @@ elf_machine_rela (struct link_map *map, const ElfW(Rela) *reloc,
const ElfW(Sym) *sym, const struct r_found_version *version,
void *const reloc_addr_arg, int skip_ifunc)
{
+ ElfW(Addr) r_info = reloc->r_info;
+ const unsigned long int r_type = ELFW (R_TYPE) (r_info);
ElfW(Addr) *const reloc_addr = reloc_addr_arg;
- const unsigned int r_type = ELF32_R_TYPE (reloc->r_info);
if (__glibc_unlikely (r_type == R_ARC_RELATIVE))
*reloc_addr += map->l_addr;
@@ -334,11 +330,12 @@ elf_machine_lazy_rel (struct link_map *map, ElfW(Addr) l_addr,
const ElfW(Rela) *reloc, int skip_ifunc)
{
ElfW(Addr) *const reloc_addr = (void *) (l_addr + reloc->r_offset);
+ const unsigned int r_type = ELFW (R_TYPE) (reloc->r_info);
- if (ELF32_R_TYPE (reloc->r_info) == R_ARC_JUMP_SLOT)
+ if (r_type == R_ARC_JUMP_SLOT)
*reloc_addr += l_addr;
else
- _dl_reloc_bad_type (map, ELF32_R_TYPE (reloc->r_info), 1);
+ _dl_reloc_bad_type (map, r_type, 1);
}
#endif /* RESOLVE_MAP */
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] ARC: fp: (micro)optimize FPU_STATUS read by eliding FWE bit clearing
2021-07-20 20:57 ` [PATCH 1/2] ARC: fp: (micro)optimize FPU_STATUS read by eliding FWE bit clearing Vineet Gupta via Libc-alpha
@ 2021-07-21 20:16 ` Vineet Gupta via Libc-alpha
0 siblings, 0 replies; 5+ messages in thread
From: Vineet Gupta via Libc-alpha @ 2021-07-21 20:16 UTC (permalink / raw)
To: libc-alpha@sourceware.org; +Cc: linux-snps-arc@lists.infradead.org
On 7/20/21 1:57 PM, Vineet Gupta via Libc-alpha wrote:
> Any FPU_STATUS write needs setting the FWE bit (31) whcih just provides
> a "control signal" to enable explicit write (vs. the side-effect of FPU
> instructions). However this bit is RAZ and write-only, thus effectively
> never stored in FPU_STATUS register. Thus when reading the register
> there is no need to clear it. This shaves off a BCLR instruction from
> the fe*exceptino family of functions and while no big deal still makes
> sense to do.
>
> This came up when debugging a race in math/test-fenv-tls [1]
>
> [1]: https://github.com/foss-for-synopsys-dwc-arc-processors/linux/issues/54
>
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Committed !
> ---
> sysdeps/arc/fpu_control.h | 15 +++++++--------
> 1 file changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/sysdeps/arc/fpu_control.h b/sysdeps/arc/fpu_control.h
> index c7d101e7838f..ae4348321c16 100644
> --- a/sysdeps/arc/fpu_control.h
> +++ b/sysdeps/arc/fpu_control.h
> @@ -81,21 +81,20 @@ typedef unsigned int fpu_control_t;
> # define _FPU_SETCW(cw) __asm__ volatile ("sr %0, [0x300]" : : "r" (cw))
>
> /* Macros for accessing the hardware status word.
> - FWE bit is special as it controls if actual status bits could be wrritten
> - explicitly (other than FPU instructions). We handle it here to keep the
> - callers agnostic of it:
> - - clear it out when reporting status bits
> - - always set it when changing status bits. */
> + Writing to FPU_STATUS requires a "control" bit FWE to be able to set the
> + exception flags directly (as opposed to side-effects of FP instructions).
> + That is done in the macro here to keeps callers agnostic of this detail.
> + And given FWE is write-only and RAZ, no need to "clear" it in _FPU_GETS
> + macro. */
> # define _FPU_GETS(cw) \
> __asm__ volatile ("lr %0, [0x301] \r\n" \
> - "bclr %0, %0, 31 \r\n" \
> : "=r" (cw))
>
> # define _FPU_SETS(cw) \
> do { \
> - unsigned int __tmp = 0x80000000 | (cw); \
> + unsigned int __fwe = 0x80000000 | (cw); \
> __asm__ volatile ("sr %0, [0x301] \r\n" \
> - : : "r" (__tmp)); \
> + : : "r" (__fwe)); \
> } while (0)
>
> /* Default control word set at startup. */
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] ARC: elf: make type safe
2021-07-20 20:58 ` [PATCH 2/2] ARC: elf: make type safe Vineet Gupta via Libc-alpha
@ 2021-07-21 20:17 ` Vineet Gupta via Libc-alpha
0 siblings, 0 replies; 5+ messages in thread
From: Vineet Gupta via Libc-alpha @ 2021-07-21 20:17 UTC (permalink / raw)
To: libc-alpha@sourceware.org; +Cc: linux-snps-arc@lists.infradead.org
On 7/20/21 1:58 PM, Vineet Gupta via Libc-alpha wrote:
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Committed !
> ---
> sysdeps/arc/dl-machine.h | 23 ++++++++++-------------
> 1 file changed, 10 insertions(+), 13 deletions(-)
>
> diff --git a/sysdeps/arc/dl-machine.h b/sysdeps/arc/dl-machine.h
> index 60b49af0d5ca..e6ce7f0ff6d9 100644
> --- a/sysdeps/arc/dl-machine.h
> +++ b/sysdeps/arc/dl-machine.h
> @@ -86,7 +86,7 @@
>
> /* Return nonzero iff ELF header is compatible with the running host. */
> static inline int
> -elf_machine_matches_host (const Elf32_Ehdr *ehdr)
> +elf_machine_matches_host (const ElfW(Ehdr) *ehdr)
> {
> return (ehdr->e_machine == EM_ARCV2 /* ARC HS. */
> || ehdr->e_machine == EM_ARC_COMPACT); /* ARC 700. */
> @@ -124,7 +124,7 @@ static inline int
> __attribute__ ((always_inline))
> elf_machine_runtime_setup (struct link_map *l, int lazy, int profile)
> {
> - extern void _dl_runtime_resolve (Elf32_Word);
> + extern void _dl_runtime_resolve (void);
>
> if (l->l_info[DT_JMPREL] && lazy)
> {
> @@ -202,7 +202,7 @@ __start: \n\
> /* A reloc type used for ld.so cmdline arg lookups to reject PLT entries. */
> #define ELF_MACHINE_JMP_SLOT R_ARC_JUMP_SLOT
>
> -/* ARC uses Elf32_Rela relocations. */
> +/* ARC uses Rela relocations. */
> #define ELF_MACHINE_NO_REL 1
> #define ELF_MACHINE_NO_RELA 0
>
> @@ -211,19 +211,14 @@ __start: \n\
> static inline ElfW(Addr)
> elf_machine_fixup_plt (struct link_map *map, lookup_t t,
> const ElfW(Sym) *refsym, const ElfW(Sym) *sym,
> - const Elf32_Rela *reloc,
> + const ElfW(Rela) *reloc,
> ElfW(Addr) *reloc_addr, ElfW(Addr) value)
> {
> return *reloc_addr = value;
> }
>
> /* Return the final value of a plt relocation. */
> -static inline ElfW(Addr)
> -elf_machine_plt_value (struct link_map *map, const Elf32_Rela *reloc,
> - ElfW(Addr) value)
> -{
> - return value;
> -}
> +#define elf_machine_plt_value(map, reloc, value) (value)
>
> /* Names of the architecture-specific auditing callback functions. */
> #define ARCH_LA_PLTENTER arc_gnu_pltenter
> @@ -239,8 +234,9 @@ elf_machine_rela (struct link_map *map, const ElfW(Rela) *reloc,
> const ElfW(Sym) *sym, const struct r_found_version *version,
> void *const reloc_addr_arg, int skip_ifunc)
> {
> + ElfW(Addr) r_info = reloc->r_info;
> + const unsigned long int r_type = ELFW (R_TYPE) (r_info);
> ElfW(Addr) *const reloc_addr = reloc_addr_arg;
> - const unsigned int r_type = ELF32_R_TYPE (reloc->r_info);
>
> if (__glibc_unlikely (r_type == R_ARC_RELATIVE))
> *reloc_addr += map->l_addr;
> @@ -334,11 +330,12 @@ elf_machine_lazy_rel (struct link_map *map, ElfW(Addr) l_addr,
> const ElfW(Rela) *reloc, int skip_ifunc)
> {
> ElfW(Addr) *const reloc_addr = (void *) (l_addr + reloc->r_offset);
> + const unsigned int r_type = ELFW (R_TYPE) (reloc->r_info);
>
> - if (ELF32_R_TYPE (reloc->r_info) == R_ARC_JUMP_SLOT)
> + if (r_type == R_ARC_JUMP_SLOT)
> *reloc_addr += l_addr;
> else
> - _dl_reloc_bad_type (map, ELF32_R_TYPE (reloc->r_info), 1);
> + _dl_reloc_bad_type (map, r_type, 1);
> }
>
> #endif /* RESOLVE_MAP */
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-07-21 20:18 UTC | newest]
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2021-07-21 20:16 ` Vineet Gupta via Libc-alpha
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