From: Siddhesh Poyarekar <siddhesh@gotplt.org>
To: Anton Youdkevitch <anton.youdkevitch@bell-sw.com>,
Wilco Dijkstra <Wilco.Dijkstra@arm.com>,
Adhemerval Zanella <adhemerval.zanella@linaro.org>,
"libc-alpha@sourceware.org" <libc-alpha@sourceware.org>
Cc: nd <nd@arm.com>
Subject: Re: [PATCH] Improve string benchtest timing
Date: Wed, 22 May 2019 18:54:44 +0530 [thread overview]
Message-ID: <ff37dfdc-73ab-9a19-9567-4f310bbf705c@gotplt.org> (raw)
In-Reply-To: <5CE542D2.5010902@bell-sw.com>
On 22/05/19 6:08 PM, Anton Youdkevitch wrote:
> They were. The difference was up to 50% in some cases. But this is the
> data for bench-memcpy. Reports for bench-memcpy-walk and
> bench-memcpy-random do not have alignment info in them.
>
> So, unaligned accesses can be much slower that aligned ones. Or, at least,
> this is how the benchmarks measure them. We already know that the results
> are not very stable, though.
bench-memcpy-walk mixes in the misaligned sizes, but it shouldn't have a
big impact because 1) the source and destination are not mutually
misaligned and 2) the alignment code is usually a tiny portion of the
execution time and hence shouldn't show up in memcpy-walk.
Siddhesh
next prev parent reply other threads:[~2019-05-22 13:25 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-08 15:39 [PATCH] Improve string benchtest timing Wilco Dijkstra
2019-05-16 14:57 ` Wilco Dijkstra
2019-05-20 18:44 ` Adhemerval Zanella
2019-05-21 7:01 ` Siddhesh Poyarekar
2019-05-21 13:58 ` Wilco Dijkstra
2019-05-21 14:11 ` Siddhesh Poyarekar
2019-05-21 15:11 ` Patrick McGehearty
2019-05-22 11:11 ` Wilco Dijkstra
2019-05-22 11:27 ` Siddhesh Poyarekar
2019-05-22 12:38 ` Anton Youdkevitch
2019-05-22 13:24 ` Siddhesh Poyarekar [this message]
2019-05-22 13:59 ` Anton Youdkevitch
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