From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on dcvr.yhbt.net X-Spam-Level: X-Spam-ASN: AS31976 209.132.180.0/23 X-Spam-Status: No, score=-4.0 required=3.0 tests=AWL,BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_PASS,SPF_PASS shortcircuit=no autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dcvr.yhbt.net (Postfix) with ESMTPS id 8045F1F461 for ; Wed, 17 Jul 2019 00:12:02 +0000 (UTC) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; q=dns; s=default; b=ILY SqkYaRNG/kexqjsCBa8bpOVV4kgPxQa5012YTYm/lLrCWmc/O1A6qRB9Uc7Ekner RUVL2IKV2y1da6GSVjysobRNYQtdGGNpd2cKKTu13QcSmKcOtlyR/wBacqLAAwyl d+fnCzBvOLmpdrpqyOqT4Ku3+strUlbmKSRp5dog= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; s=default; bh=YiG64YA9P oAlD5EBFmUk8diqQt4=; b=UZLqZciQf/1yCqNn9AsZR/Jx4OU+qPYeU52+yreU/ zoLlFMjVJ0Plar/gh0PTbAwS0ufi9E4hwSDKqCOGLBIQFjTw5TYZM6Sg+ekHiQOF YgJbvRxC/xuO2e+Kgc2Ue0qpC8SQ87izFsLbbdDAXKbOAqCWxyG+DfGC8+cOpz+D po= Received: (qmail 15193 invoked by alias); 17 Jul 2019 00:11:43 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 15133 invoked by uid 89); 17 Jul 2019 00:11:42 -0000 Authentication-Results: sourceware.org; auth=none X-HELO: esa4.hgst.iphmx.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1563322295; x=1594858295; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=YxeR2hbvb0TM0gi1fC0L2x1MD7TkGSoDIKJbCwMUArM=; b=MN6HW4VCrLEsq9v+7yG8uqA12QkFBmhEBNHAiJko/c6NeEMInlACubKW OUQ8QyzRKoOD7/KKLTVre41HTeu4PD3n9PWXhGKXbn2bvmY8by8AiknsX 9QH4v/CroYaplGRAy4TcyzzIvJrxxJmsufRvj7CchnpCIkfsj63lM6pdk 4PZRdzYy3SEO5FCPBTchBm34pmKVrRb7wNJgkz9rC2nu3S1sN+kucaVPM PKidIyCuXAT8q02VyTZpnhxhDBBhmSiujyq/aaj/HCuGKqOy+S81z31+i 8k2At5DtGikyg3MwJhVquDv1XKgXTJCBPVRqEMokzdFpulFMlRPgMuN6D Q==; IronPort-SDR: n2uQvCFxbdIz/jW11fYf3FE82IrB/xjrrLdFSuGXXAPkac+iQlUMuzzJXxkJEbvBBOcGcgaEou aeKSWBtyHKETuFBGg56PB3cV0M5ZOi7X9anEtHpYzfUMb69Jrwh896SUc6OAciIej5dSCqtrfs yR8dsgGDG5RsJgf3JrWZXa3iJz4ezWuqoxDiOX8R7eKwwQ0WJpHvvq08I19/U458eQWAitsq9P 1k8SH2vpM8vQh9ifVMAHy6QXKjiLWOHdh9D1FalOez3Cq7gVgZsmOWz8PuRROe3tbGE+Xjt25I dY0= IronPort-SDR: GTUc9Yw/p0U81ZIvFMbk0ca5OyH7lbwdCJ/HiWn7FX3czL0DQV3+NI9Bjj7pkgRogLo6pAbZN+ oETN4dnj4waMfvDojswjmMQSLMq8m2wd+jhb9nTkMKRLX6rld5fyFUvIOeFVGV8e+zROZA+rp7 DAvlGeauEd9h+wYW9fVrIO13PG5GqJodztcnuMapzyYtVKBWvmPCo1kC0lTQowhDZt9/6pwNdn H3QSu7KN4fuYFyl4t6IOmkI7M4Vs1q5o8YTpo+3CNASMG9eAc0CFpx3f5VW4CKt6hUc7uk8ien LWt52IIfCV73bLu6Kn+aJnCJ IronPort-SDR: PWgC+pUIUw0XCGm1H20bWsEgmtC5Sspws4TzNoWdHLRddeK/lgK+B5ETNjdmAIkgL2M4Rr6lyf hiOEXHkh10Gqe2jJoiDYmZwwytmHTCHVMWUNmVkfdj9zprNx9yZse3DXp+KxVZZ6D1WN91HjYB uE6wvjjn2j0OyiY369cseP4itMBmJO+qwAhWUqgbLL0HZCdaVfzIiFHrCYP/kPe5dYXbw7Ro65 S2xoOGJK8s40AziioRnWZ/2vP4SJQ+rEnTY3YHPqj4Gn/rm1UI/5Xja2JUW/cArN+BmgVK3aAs rFs= From: Alistair Francis To: libc-alpha@sourceware.org Cc: arnd@arndb.de, adhemerval.zanella@linaro.org, fweimer@redhat.com, palmer@sifive.com, macro@wdc.com, zongbox@gmail.com, alistair.francis@wdc.com, alistair23@gmail.com Subject: [RFC v3 00/23] RISC-V glibc port for the 32-bit Date: Tue, 16 Jul 2019 17:08:40 -0700 Message-Id: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patch set contains the glibc port for the 32-bit RISC-V. This is based on all of the work that Zong Li has done [1]. Unfortunately the Linux ABI has changed since Zong Li's latest submission. The RISC-V 32-bit (RV32) ABI no longer defines __ARCH_WANT_TIME32_SYSCALLS which means there are no 32-bit versions of time_t, off_t or any struct resource or system calls that use them. To mitigate this I have set the RV32 port to use 64-bit time_t and off_t (as is done in x86-32) and also changed the syscall imvocation to handle the missing syscalls. This series applies ontop of Lukasz's __clock_settime64 iomplementation [2]. The ChangeLog will need to be updated, so don't worry too much about that. All testing has been done on a 5.1 kernel (it won't work on earlier kernels). Importantly glibc is not the only project that needs to be updated to work with a 32-bit kernel that doesn't define __ARCH_WANT_TIME32_SYSCALLS. So far OpenSSL, busybox and systemd all need patches to work with RV32. My hope here is that we can get a reasonable agreement on how to handle this in glibc and then use that to update other projects. This is why I would still really like feedback even though this won't go into the next release. Feedback on this series is very welcome! 1: https://sourceware.org/ml/libc-alpha/2018-07/msg00892.html 2: https://sourceware.org/ml/libc-alpha/2019-05/msg00661.html The latest version of my work can be found here: https://github.com/alistair23/glibc/tree/alistair/rv32.next This specific version can be found here: https://github.com/alistair23/glibc/tree/alistair/rv32.rfc3 RFC v3: - Remove all "Hack" patches - Incorporate upstream comments - Ensure we don't break RV64 - Lot's more testing and fixes RFC v2: - Add Lukasz's patches - Update the non HACK syscalls after feedback - define __ASSUME_TIME64_SYSCALLS and __ASSUME_RLIM64_SYSCALLS - Remove lockf64.c - Other smaller changes from RFC v1 --END--- Signed-off-by: Alistair Francis --- __COVER__ | 0 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 __COVER__ diff --git a/__COVER__ b/__COVER__ new file mode 100644 index 0000000000..e69de29bb2 -- 2.22.0 Alistair Francis (13): sysdeps/nanosleep: Use clock_nanosleep_time64 if avaliable sysdeps/gettimeofday: Use clock_gettime64 if avaliable sysdeps/wait: Use waitid if avaliable sysdeps/clock_gettime: Use clock_gettime64 if avaliable sysdeps/timespec_get: Use clock_gettime64 if avaliable RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 RISC-V: define __NR_futex as __NR_futex_time64 for 32-bit RISC-V: define __NR_* as __NR_*_time64/64 for 32-bit RISC-V: define __NR_clock_getres as __NR_*_time64 for 32-bit RISC-V: define __vdso_clock_getres as __vdso_clock_getres_time64 for 32-bit RISC-V: define __vdso_clock_gettime as __vdso_clock_gettime64 for 32-bit RISC-V: Use 64-bit timespec in clock_gettime vdso calls RISC-V: Use 64-bit vdso syscalls Zong Li (10): Documentation for the RISC-V 32-bit port RISC-V: Support dynamic loader for the 32-bit RISC-V: Add path of library directories for the 32-bit RISC-V: The ABI implementation for the 32-bit RISC-V: Hard float support for the 32 bit RISC-V: Regenerate ULPs of RISC-V RISC-V: Add ABI lists RISC-V: Build Infastructure for the 32-bit RISC-V: Fix llrint and llround missing exceptions on RV32 Add RISC-V 32-bit target to build-many-glibcs.py ChangeLog | 113 + NEWS | 6 + README | 1 + nptl/pthread_mutex_timedlock.c | 7 + nptl/thrd_sleep.c | 41 +- scripts/build-many-glibcs.py | 15 + sysdeps/riscv/bits/wordsize.h | 4 +- sysdeps/riscv/nofpu/libm-test-ulps | 16 +- sysdeps/riscv/nptl/bits/pthreadtypes-arch.h | 25 +- sysdeps/riscv/preconfigure | 6 +- sysdeps/riscv/rv32/Implies-after | 1 + .../riscv/rv32/fix-fp-int-convert-overflow.h | 38 + sysdeps/riscv/rv32/rvd/Implies | 3 + sysdeps/riscv/rv32/rvd/s_lrint.c | 31 + sysdeps/riscv/rv32/rvd/s_lround.c | 31 + sysdeps/riscv/rv32/rvf/Implies | 1 + sysdeps/riscv/rv32/rvf/s_lrintf.c | 31 + sysdeps/riscv/rv32/rvf/s_lroundf.c | 31 + sysdeps/riscv/{rv64 => }/rvd/libm-test-ulps | 56 +- .../riscv/{rv64 => }/rvd/libm-test-ulps-name | 0 sysdeps/riscv/sfp-machine.h | 27 +- sysdeps/riscv/sys/asm.h | 5 +- sysdeps/unix/sysv/linux/clock_gettime.c | 30 + sysdeps/unix/sysv/linux/clock_nanosleep.c | 42 +- sysdeps/unix/sysv/linux/gettimeofday.c | 28 + sysdeps/unix/sysv/linux/nanosleep.c | 50 + sysdeps/unix/sysv/linux/nanosleep_nocancel.c | 11 + sysdeps/unix/sysv/linux/riscv/Makefile | 4 +- .../unix/sysv/linux/riscv/bits/environments.h | 85 + sysdeps/unix/sysv/linux/riscv/bits/time64.h | 36 + sysdeps/unix/sysv/linux/riscv/bits/timesize.h | 22 + .../unix/sysv/linux/riscv/bits/typesizes.h | 84 + sysdeps/unix/sysv/linux/riscv/configure | 39 + sysdeps/unix/sysv/linux/riscv/configure.ac | 8 + sysdeps/unix/sysv/linux/riscv/dl-cache.h | 17 +- sysdeps/unix/sysv/linux/riscv/init-first.c | 6 +- sysdeps/unix/sysv/linux/riscv/ldconfig.h | 2 +- sysdeps/unix/sysv/linux/riscv/libc-vdso.h | 2 +- sysdeps/unix/sysv/linux/riscv/rv32/Implies | 3 + .../unix/sysv/linux/riscv/rv32/c++-types.data | 67 + .../sysv/linux/riscv/rv32/jmp_buf-macros.h | 53 + sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist | 9 + .../linux/riscv/rv32/libBrokenLocale.abilist | 1 + .../unix/sysv/linux/riscv/rv32/libanl.abilist | 4 + .../unix/sysv/linux/riscv/rv32/libc.abilist | 2101 +++++++++++++++++ .../sysv/linux/riscv/rv32/libcrypt.abilist | 2 + .../unix/sysv/linux/riscv/rv32/libdl.abilist | 9 + .../unix/sysv/linux/riscv/rv32/libm.abilist | 1021 ++++++++ .../sysv/linux/riscv/rv32/libpthread.abilist | 235 ++ .../sysv/linux/riscv/rv32/libresolv.abilist | 79 + .../unix/sysv/linux/riscv/rv32/librt.abilist | 35 + .../linux/riscv/rv32/libthread_db.abilist | 40 + .../sysv/linux/riscv/rv32/libutil.abilist | 6 + sysdeps/unix/sysv/linux/riscv/shlib-versions | 10 +- sysdeps/unix/sysv/linux/riscv/sysdep.h | 61 + sysdeps/unix/sysv/linux/timespec_get.c | 37 +- sysdeps/unix/sysv/linux/wait.c | 39 +- sysdeps/unix/sysv/linux/waitpid.c | 46 + sysdeps/unix/sysv/linux/waitpid_nocancel.c | 45 + 59 files changed, 4796 insertions(+), 62 deletions(-) create mode 100644 sysdeps/riscv/rv32/Implies-after create mode 100644 sysdeps/riscv/rv32/fix-fp-int-convert-overflow.h create mode 100644 sysdeps/riscv/rv32/rvd/Implies create mode 100644 sysdeps/riscv/rv32/rvd/s_lrint.c create mode 100644 sysdeps/riscv/rv32/rvd/s_lround.c create mode 100644 sysdeps/riscv/rv32/rvf/Implies create mode 100644 sysdeps/riscv/rv32/rvf/s_lrintf.c create mode 100644 sysdeps/riscv/rv32/rvf/s_lroundf.c rename sysdeps/riscv/{rv64 => }/rvd/libm-test-ulps (98%) rename sysdeps/riscv/{rv64 => }/rvd/libm-test-ulps-name (100%) create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/environments.h create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/time64.h create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/timesize.h create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/typesizes.h create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/Implies create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/c++-types.data create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/jmp_buf-macros.h create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/ld.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libBrokenLocale.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libanl.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libc.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libcrypt.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libdl.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libm.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libpthread.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libresolv.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/librt.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libthread_db.abilist create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/libutil.abilist -- 2.22.0