unofficial mirror of libc-alpha@sourceware.org
 help / color / mirror / Atom feed
From: "Maciej W. Rozycki via Libc-alpha" <libc-alpha@sourceware.org>
To: Alistair Francis <alistair23@gmail.com>
Cc: GNU C Library <libc-alpha@sourceware.org>,
	Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PATCH v2 10/18] RISC-V: Hard float support for 32-bit
Date: Sun, 12 Jul 2020 23:10:06 +0100 (BST)	[thread overview]
Message-ID: <alpine.LFD.2.21.2007122157540.24175@redsun52.ssa.fujisawa.hgst.com> (raw)
In-Reply-To: <CAKmqyKN=xbr1+ECWqV3f2wbc-TeGfKS+csV7oi+NwSz=kndUAQ@mail.gmail.com>

On Sun, 12 Jul 2020, Alistair Francis wrote:

> >  I don't think there is a simple alternative available for RV32 that would
> > be worth keeping together with the RV64 variant.  Did I miss anything?
> > What instruction(s) do you have in mind?
> 
> Something like this for the generic RISC-V lround:
> 
> long int
> __lroundf (float x)
> {
> #if __WORDSIZE == 64
>   int64_t res;
>   asm ("fcvt.l.s %0, %1, rmm" : "=r" (res) : "f" (x));
> #else
>   int32_t res;
>   asm ("fcvt.w.s %0, %1, rmm" : "=r" (res) : "f" (x));
> #endif
>   return res;
> }
> 
> I'm not sure if it's clearer, but for some of the more complex
> functions (roundeven for example) it might be easier.
> 
> It also means if there is a bug fixed in one it'll end up fixed for both.

 Ah, you mean the `float' to `long int' conversion functions, necessarily 
ABI-specific due to the changing width of the latter data type.  Well, I 
meant the operations involving FCVT.L.D/FCVT.D.L.  I can see no RISC-V 
solution for them that would surpass the generic implementation.

 As far as your example above is concerned if we decided to merge the 
files at all, I would reduce it to:

#if __WORDSIZE == 64
# define OP "fcvt.l.s"
#elif __WORDSIZE == 32
# define OP "fcvt.w.s"
#else
# error Unsupported
#endif

long int
__lroundf (float x)
{
  long int res;
  asm (OP "\t%0, %1, rmm" : "=r" (res) : "f" (x));
  return res;
}

or suchlike (I'm not sure if there's any gain here from `res' having an 
explicit-width data type).  Likewise with the rest.

  Maciej

  reply	other threads:[~2020-07-12 22:10 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-03 16:25 [PATCH v2 00/18] glibc port for 32-bit RISC-V (RV32) Alistair Francis via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 01/18] RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 Alistair Francis via Libc-alpha
2020-07-07 22:06   ` Maciej W. Rozycki via Libc-alpha
2020-07-10 15:27     ` Alistair Francis via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 02/18] RISC-V: Define __NR_* as __NR_*_time64/64 for 32-bit Alistair Francis via Libc-alpha
2020-07-08  0:09   ` Maciej W. Rozycki via Libc-alpha
2020-07-08 17:08     ` Adhemerval Zanella via Libc-alpha
2020-07-09 17:14       ` Alistair Francis via Libc-alpha
2020-07-16  0:23       ` Maciej W. Rozycki via Libc-alpha
2020-07-09 17:10     ` Alistair Francis via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 03/18] RISC-V: Add support for 32-bit vDSO calls Alistair Francis via Libc-alpha
2020-07-08  1:01   ` Maciej W. Rozycki via Libc-alpha
2020-07-08 18:17     ` Alistair Francis via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 04/18] RISC-V: Support dynamic loader for the 32-bit Alistair Francis via Libc-alpha
2020-07-08  1:35   ` Maciej W. Rozycki via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 05/18] RISC-V: Add path of library directories " Alistair Francis via Libc-alpha
2020-07-08 18:42   ` Maciej W. Rozycki via Libc-alpha
2020-07-09 17:03     ` Alistair Francis via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 06/18] RISC-V: Add arch-syscall.h for RV32 Alistair Francis via Libc-alpha
2020-07-08 19:33   ` Maciej W. Rozycki via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 07/18] RISC-V: nptl: update default pthread-offsets.h Alistair Francis via Libc-alpha
2020-07-09  0:14   ` Maciej W. Rozycki via Libc-alpha
2020-07-09 11:47     ` Adhemerval Zanella via Libc-alpha
2020-07-15 19:23       ` Maciej W. Rozycki via Libc-alpha
2020-08-10 17:34     ` Alistair Francis via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 08/18] riscv32: Add an architecture ipctypes.h Alistair Francis via Libc-alpha
2020-07-09  2:46   ` Maciej W. Rozycki via Libc-alpha
2020-07-09 11:36     ` Adhemerval Zanella via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 09/18] RISC-V: The ABI implementation for 32-bit Alistair Francis via Libc-alpha
2020-07-09 23:33   ` Maciej W. Rozycki via Libc-alpha
2020-07-10 16:45     ` Alistair Francis via Libc-alpha
2020-07-11  1:24       ` Maciej W. Rozycki via Libc-alpha
2020-08-10 21:29         ` Alistair Francis via Libc-alpha
2020-08-27 19:43           ` Adhemerval Zanella via Libc-alpha
2020-09-25 23:03             ` Alistair Francis via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 10/18] RISC-V: Hard float support " Alistair Francis via Libc-alpha
2020-07-11  0:49   ` Maciej W. Rozycki via Libc-alpha
2020-07-11 15:49     ` Alistair Francis via Libc-alpha
2020-07-11 22:13       ` Maciej W. Rozycki via Libc-alpha
2020-07-12 15:34         ` Alistair Francis via Libc-alpha
2020-07-12 22:10           ` Maciej W. Rozycki via Libc-alpha [this message]
2020-08-27 18:36             ` Alistair Francis via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 11/18] RISC-V: Add ABI lists Alistair Francis via Libc-alpha
2020-07-12 20:54   ` Maciej W. Rozycki via Libc-alpha
2020-07-13 16:14     ` Alistair Francis via Libc-alpha
2020-06-03 16:25 ` [PATCH v2 12/18] RISC-V: Add the RV32 libm-test-ulps Alistair Francis via Libc-alpha
2020-06-03 17:34   ` Joseph Myers
2020-06-05  4:01     ` Alistair Francis via Libc-alpha
2020-06-03 16:26 ` [PATCH v2 13/18] RISC-V: Fix llrint and llround missing exceptions on RV32 Alistair Francis via Libc-alpha
2020-06-03 16:26 ` [PATCH v2 14/18] RISC-V: Build Infastructure for 32-bit Alistair Francis via Libc-alpha
2020-06-03 16:26 ` [PATCH v2 15/18] riscv32: Specify the arch_minimum_kernel as 5.4 Alistair Francis via Libc-alpha
2020-06-03 16:26 ` [PATCH v2 16/18] RISC-V: Add rv32 path to RTLDLIST in ldd Alistair Francis via Libc-alpha
2020-06-03 16:26 ` [PATCH v2 17/18] Documentation for the RISC-V 32-bit port Alistair Francis via Libc-alpha
2020-06-03 16:26 ` [PATCH v2 18/18] Add RISC-V 32-bit target to build-many-glibcs.py Alistair Francis via Libc-alpha
2020-06-15 22:37 ` [PATCH v2 00/18] glibc port for 32-bit RISC-V (RV32) Alistair Francis via Libc-alpha

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

  List information: https://www.gnu.org/software/libc/involved.html

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=alpine.LFD.2.21.2007122157540.24175@redsun52.ssa.fujisawa.hgst.com \
    --to=libc-alpha@sourceware.org \
    --cc=alistair.francis@wdc.com \
    --cc=alistair23@gmail.com \
    --cc=macro@wdc.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).