From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on dcvr.yhbt.net X-Spam-Level: X-Spam-Status: No, score=-4.2 required=3.0 tests=AWL,BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, SPF_HELO_PASS,SPF_PASS shortcircuit=no autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by dcvr.yhbt.net (Postfix) with ESMTPS id 3AE391F5AE for ; Sat, 11 Jul 2020 01:24:38 +0000 (UTC) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D5D92385700F; Sat, 11 Jul 2020 01:24:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D5D92385700F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1594430676; bh=jNc/3hr50acpbIFgsSqIN04uNj3IrgS5Z6AFRSVC5qs=; h=Date:To:Subject:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=Fp/qHofGrldkPoahRCygjMkUWHt4QJXHJTHCHBEfxyruiObA3SOFMSaIwMt1BKCZw UymOHjhixMFj19GLYz3TEI/87Fwt755E3tdg/7cPb9GiSAPtlG9g+aMq3R+bDvY73p rmZo2i2bqfvP+1hKZYwa1lSrwsAF51/iWZxKiqjs= Received: from esa6.hgst.iphmx.com (esa6.hgst.iphmx.com [216.71.154.45]) by sourceware.org (Postfix) with ESMTPS id A0596385700A for ; Sat, 11 Jul 2020 01:24:32 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org A0596385700A IronPort-SDR: 0VcRNKlQEGIeFAEz1ftRWvrnQSYkk0d1B9rSy166Yf8LMEcy/qjf4ih/3CqEVEImsXqXPZTBW6 oatj7XwdrtIYvz6zb4AHWTN+3C6iJTKuZ4Kf1ck1hjjL6Eku2asCQMC9vCa4Gf+2GxdF+uPYsq hrMPKaTvZwISpBdn/4KOonfXrjpMKT0Xy/CNxvzPcilIanybTgqCob+Gbvu9zbmUWTez4Q8DP9 LK8aQkFUHECDGddOndplbRpFcgbIsXI++KUpcpyMskyuw84RYnX3QuMxIMy44RAexI4KCxFXRB SGc= X-IronPort-AV: E=Sophos;i="5.75,337,1589212800"; d="scan'208";a="143497824" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 11 Jul 2020 09:24:31 +0800 IronPort-SDR: CTXDwr+LR09GPl0UfARVKwW6iBMSgO+z3PW4+exCU3lxf/wuuyYiGtN/4YNiOimxoVCXcw9eMg LdiuCxB5l3psMJyphsbpQtc6NysdSvi0A= Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2020 18:12:32 -0700 IronPort-SDR: kUMVs4BPA3jyDGu6zIJKtFk1v6KRG2LaaorDEfIH92TwWRv0Y4CZQCO5zQA7OIr7ynIXEBMtRw 9b8mEyTa3rJQ== WDCIronportException: Internal Received: from unknown (HELO redsun52) ([10.149.66.28]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2020 18:24:32 -0700 Date: Sat, 11 Jul 2020 02:24:26 +0100 (BST) To: Alistair Francis Subject: Re: [PATCH v2 09/18] RISC-V: The ABI implementation for 32-bit In-Reply-To: Message-ID: References: User-Agent: Alpine 2.21 (LFD 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: "Maciej W. Rozycki via Libc-alpha" Reply-To: "Maciej W. Rozycki" Cc: GNU C Library , Alistair Francis Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" On Fri, 10 Jul 2020, Alistair Francis wrote: > > I note there is an extensive discussion on the way to move forward here: > > > > We might as well try to implement it right away, so as to avoid being > > limited to 32-bit time records here. > > Is there an advantage of doing it now or can we put this off for the > next release? The change is major enough it'll have to wait for the next development cycle anyway. It shouldn't matter that much for RV32 glibc deployments though, given the amount of suitable hardware available. > > NB some existing ports do have __WORDSIZE_TIME64_COMPAT32 set and cleared > > for their 64-bit and 32-bit ABIs respectively, as per the note in our > > top-level bits/wordsize.h, however this reflects the state as before we > > introduced the possibility for `__time_t' to be a 64-bit type with > > `__WORDSIZE == 32' ABIs. Given the turn of events I think the note ought > > to be updated accordingly; I gather it was missed with commit 07fe93cd9850 > > ("generic/typesizes.h: Add support for 32-bit arches with 64-bit types"). Will you be able to look into it? The context here is before Y2038 changes __WORDSIZE_TIME64_COMPAT32 would only be clear for 64-bit ABIs with those 64-bit systems that do not have any 32-bit ABI (compatibility mode) to support, such as the DEC Alpha. And it would always be clear for 32-bit ABIs, so as to use the proper `__time_t' type without changing the width of actual data held there in the structure. I'm not sure what the story is behind the S/390 port though; perhaps it does not support ABI coexistence in a single run-time environment. > > > int __cur_writer; > > > int __shared; > > > unsigned long int __pad1; > > > unsigned long int __pad2; > > > unsigned int __flags; > > > +#else > > > +# if __BYTE_ORDER == __BIG_ENDIAN > > > + unsigned char __pad1; > > > + unsigned char __pad2; > > > + unsigned char __shared; > > > + unsigned char __flags; > > > +# else > > > + unsigned char __flags; > > > + unsigned char __shared; > > > + unsigned char __pad1; > > > + unsigned char __pad2; > > > +# endif > > > + int __cur_writer; > > > +#endif > > > }; > > > > I note with this change the RV32 structure will use the generic layout as > > per sysdeps/nptl/bits/struct_rwlock.h, however regrettably RV64 does not. > > Would it make sense to instead have the layout the same between RV64 and > > RV32, perhaps by redefining `__pad1' and `__pad2' in terms of `unsigned > > long long' (which would have alignment implications though) or otherwise? > > I'm not sure which one is better. On one hand it seems better to be > more generic and therefore RV32 should use the generic interface. On > the other hand the more similar they are the better. I'm still leaning > towards we should be generic where possible. It would be good to get a second opinion here. > > Is there any benefit from having `__flags' and `__shared' (and the > > reserve) grouped within a single 32-bit word? I gather there is, given > > the lengths gone to to match the bit lanes across the word regardless of > > the endianness. But what is it? > > I have no idea. Especially given this. > > > +# define _FP_DIV_MEAT_S(R, X, Y) _FP_DIV_MEAT_1_udiv_norm (S, R, X, Y) > > > +# define _FP_DIV_MEAT_D(R, X, Y) _FP_DIV_MEAT_2_udiv (D, R, X, Y) > > > +# define _FP_DIV_MEAT_Q(R, X, Y) _FP_DIV_MEAT_4_udiv (Q, R, X, Y) > > > + > > > +# define _FP_NANFRAC_S _FP_QNANBIT_S > > > +# define _FP_NANFRAC_D _FP_QNANBIT_D, 0 > > > +# define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 > > > > Likewise. There seems to be an established practice for this header > > across architectures to have no space between macro arguments or before > > the opening parenthesis. This might help with the alignment. > > I still think it makes sense to follow the glibc style though, even if > other archs don't. > > Let me know if it should be a different way and I'll update it. There is the issue of the discrepancy compared to the libgcc version, and while `diff -l' and `patch -l' solve that for manual processing, more sophisticated tools may not cope and require manual intervention. Again, I would suggest getting a second opinion. Maciej