From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on dcvr.yhbt.net X-Spam-Level: X-Spam-ASN: AS17314 8.43.84.0/22 X-Spam-Status: No, score=-3.7 required=3.0 tests=AWL,BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, PDS_RDNS_DYNAMIC_FP,RCVD_IN_DNSWL_MED,RDNS_DYNAMIC,SPF_HELO_PASS, SPF_PASS shortcircuit=no autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by dcvr.yhbt.net (Postfix) with ESMTPS id DF9B81F8C6 for ; Fri, 2 Jul 2021 08:04:25 +0000 (UTC) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 2A2AF3892443 for ; Fri, 2 Jul 2021 08:04:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2A2AF3892443 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1625213065; bh=D7c4xowT7jKHh6+RcT+XryvEPEKu9/PA0O5LWIytc5w=; h=References:In-Reply-To:Date:Subject:To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=A8M5di9sdUcLqDbj7hczgGLV1uS4MuWut2My+vQtBSiOMcYWkG4x9kWlO4uN3f4Dn XtIFdPSgXtzEPGU1N9Dpik/pwH6ofKOlZYV0ArX+Ko/7TYpY34WZb/Vyn59+C4717H p4+CJKdyGD7bGd3jtDcAvmiZrTWN41tmTllkyZ70= Received: from mail-vs1-xe2b.google.com (mail-vs1-xe2b.google.com [IPv6:2607:f8b0:4864:20::e2b]) by sourceware.org (Postfix) with ESMTPS id 59C4C383A810 for ; Fri, 2 Jul 2021 07:58:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 59C4C383A810 Received: by mail-vs1-xe2b.google.com with SMTP id x15so3826821vsc.1 for ; Fri, 02 Jul 2021 00:58:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=D7c4xowT7jKHh6+RcT+XryvEPEKu9/PA0O5LWIytc5w=; b=iCBi6khFdc4EGvXBYcpmsnqBaKo560gGHYNnPaWTckzqDez/OWMFPaSWmXDKwm6SZK 1MzXMrMcS0LE8pXAX9Yl5U6TBKRky1cVjTtnkp4RQYBvHfF+NKpYbWhsUzZjc4PLEx15 dOgwNW+DjDfo7F6GW+1ZwCfdJ0rgfes8yw/evXW1Xrq57rkk5pKGYXnwcsY9KPiXI8wn pE0R7o0VWfkpiXiKSk6OVbgK94lBFx2dBPenZX0mgOEHw3rWSsv9zQODRORoDj+8cOX+ 5gWZ0ZJejDvsfrbRpdfYB+S1Dn+LuTxL/cn8t3Hp5DpjpLX7iWl/Q+euaDSepaaRznTq T+BA== X-Gm-Message-State: AOAM530DUwdKsYR/eg5eFgGoRDH7cwro30CXYu3yMg9uOHr6l333x4vq yuWmy75zjIbeoyd4DuRScWKtW5QLESCNVM/YLe0= X-Google-Smtp-Source: ABdhPJyDdVVp040za4gmHdPBmEhruQWelvv/r3f7fi5uS06mME6g4WboZRnbdGzZr9Ri27naZv54vhaMBb4/O8XUMnM= X-Received: by 2002:a67:be05:: with SMTP id x5mr5147042vsq.45.1625212702484; Fri, 02 Jul 2021 00:58:22 -0700 (PDT) MIME-Version: 1.0 References: <20210701210537.51272-1-hjl.tools@gmail.com> In-Reply-To: Date: Fri, 2 Jul 2021 16:03:25 +0800 Message-ID: Subject: Re: [llvm-dev] [PATCH] Add optional _Float16 support To: Richard Biener Content-Type: text/plain; charset="UTF-8" X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Hongtao Liu via Libc-alpha Reply-To: Hongtao Liu Cc: GNU C Library , Jacob Lifshay , llvm-dev , GCC Patches , IA32 System V Application Binary Interface , Joseph Myers Errors-To: libc-alpha-bounces+e=80x24.org@sourceware.org Sender: "Libc-alpha" On Fri, Jul 2, 2021 at 3:46 PM Richard Biener via llvm-dev wrote: > > On Fri, Jul 2, 2021 at 1:34 AM Jacob Lifshay via Gcc-patches > wrote: > > > > On Thu, Jul 1, 2021, 15:28 H.J. Lu via llvm-dev > > wrote: > > > > > On Thu, Jul 1, 2021 at 3:10 PM Joseph Myers > > > wrote: > > > > > > > > On Thu, 1 Jul 2021, H.J. Lu via Gcc-patches wrote: > > > > > > > > > 2. Return _Float16 and _Complex _Float16 values in %xmm0/%xmm1 > > > registers. > > > > > > > > That restricts use of _Float16 to processors with SSE. Is that what we > > > > want in the ABI, or should _Float16 be available with base 32-bit x86 > > > > architecture features only, much like _Float128 and the decimal FP types > > > > > > Yes, _Float16 requires XMM registers. > > > > > > > are? (If it is restricted to SSE, we can of course ensure relevant > > > libgcc > > > > functions are built with SSE enabled, and likewise in glibc if that gains > > > > _Float16 functions, though maybe with some extra complications to get > > > > relevant testcases to run whenever possible.) > > > > > > > > > > _Float16 functions in libgcc should be compiled with SSE enabled. > > > > > > BTW, _Float16 software emulation may require more than just SSE > > > since we need to do _Float16 load and store with XMM registers. > > > There is no 16bit load/store for XMM registers without AVX512FP16. > > > > > > > Umm, if you just need to load/store 16-bit scalars in XMM registers you can > > use pextrw and pinsrw which don't require AVX. f16x8 can use any of the > > standard full-register load/stores. > > It looks like that requires SSE2, with SSE only inserts/extracts > to/from MMX regs > are supported. But of course GPR half-word loads and GPR->XMM moves of > full size would work. movd between sse registers and gpr also required sse2. > > > https://gcc.godbolt.org/z/ncznr9TM1 > > > > Jacob > _______________________________________________ > LLVM Developers mailing list > llvm-dev@lists.llvm.org > https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev -- BR, Hongtao