From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on dcvr.yhbt.net X-Spam-Level: X-Spam-ASN: AS17314 8.43.84.0/22 X-Spam-Status: No, score=-3.7 required=3.0 tests=AWL,BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, PDS_RDNS_DYNAMIC_FP,RCVD_IN_DNSWL_MED,RDNS_DYNAMIC,SPF_HELO_PASS, SPF_PASS shortcircuit=no autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by dcvr.yhbt.net (Postfix) with ESMTPS id BD8F91F8C6 for ; Fri, 2 Jul 2021 07:46:20 +0000 (UTC) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A49F6383A826 for ; Fri, 2 Jul 2021 07:46:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A49F6383A826 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1625211979; bh=m2ayl3UqKAEso/mkkNg95+Yi9GUXUWvmsgHtFV/9VwY=; h=References:In-Reply-To:Date:Subject:To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=HUfn2Go6iKWMi/DTCRdXlIIsAEXOp3YYsplE0uWbYpcvhuN4MA8+vALxamNcNjBe8 z/Si/jLvXt8efK5ocpouOp/jbAW1kUUBGneSaNEqZi5Jp2Ck761KKVq5fbF8pt2/gK gwm50emppJ1SloW43PFT9ROHqxMVzaR1MepL8hpo= Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by sourceware.org (Postfix) with ESMTPS id 600603857C44 for ; Fri, 2 Jul 2021 07:45:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 600603857C44 Received: by mail-ed1-x52e.google.com with SMTP id l24so11976475edr.11 for ; Fri, 02 Jul 2021 00:45:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=m2ayl3UqKAEso/mkkNg95+Yi9GUXUWvmsgHtFV/9VwY=; b=D36phZPUp6ri+Kl/KDLDFgaFp/vz+Lkh4HrbW4T4FtxN/oGrhNAdxusHDfU3KE6NVe 52H5+bzgg0zfB7gOpelkBND8gKY+wCSBd6SMAfyUOA/I6j1i3M2N40KbTxv7OZKqbcYp /Jpo/ucfT6iHNig0lFgykwDCxBc6m0NR8/lQOyTE3KyNQ5xf2O+TW6XH9hU8q826yjWb 0c1xPmR/GpsMC+gCAyG89WsKrmJY4FfB0fzP+tTGe7eJDzmq0p+A/qEeMEOoWOVJkF01 1+7JMOcn1GrRmg6YF0ukarZpUJ7+GP3B7+joj+52LfTmf2RP+N0ZBy1LCFbgmDPqYyRQ G+0w== X-Gm-Message-State: AOAM530IM/eGbZ9oLLHF+FRan6LSo6MGU27fFrh67kZrBg5nGCXOONPc d4ckWRX33LGdsucz6XQRHX1obd3q16VaidSg/GE= X-Google-Smtp-Source: ABdhPJwW+mqv2NQYDpUi0ogFQWbpn/PC+VkQSu/fiAJrY1Nkz9TSZ9zH8IhnDViND38mlJykaOtk6CnNcCX4JvGbX+8= X-Received: by 2002:a05:6402:42c9:: with SMTP id i9mr5044324edc.61.1625211957485; Fri, 02 Jul 2021 00:45:57 -0700 (PDT) MIME-Version: 1.0 References: <20210701210537.51272-1-hjl.tools@gmail.com> In-Reply-To: Date: Fri, 2 Jul 2021 09:45:46 +0200 Message-ID: Subject: Re: [llvm-dev] [PATCH] Add optional _Float16 support To: Jacob Lifshay Content-Type: text/plain; charset="UTF-8" X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Richard Biener via Libc-alpha Reply-To: Richard Biener Cc: GNU C Library , llvm-dev , GCC Patches , IA32 System V Application Binary Interface , Joseph Myers Errors-To: libc-alpha-bounces+e=80x24.org@sourceware.org Sender: "Libc-alpha" On Fri, Jul 2, 2021 at 1:34 AM Jacob Lifshay via Gcc-patches wrote: > > On Thu, Jul 1, 2021, 15:28 H.J. Lu via llvm-dev > wrote: > > > On Thu, Jul 1, 2021 at 3:10 PM Joseph Myers > > wrote: > > > > > > On Thu, 1 Jul 2021, H.J. Lu via Gcc-patches wrote: > > > > > > > 2. Return _Float16 and _Complex _Float16 values in %xmm0/%xmm1 > > registers. > > > > > > That restricts use of _Float16 to processors with SSE. Is that what we > > > want in the ABI, or should _Float16 be available with base 32-bit x86 > > > architecture features only, much like _Float128 and the decimal FP types > > > > Yes, _Float16 requires XMM registers. > > > > > are? (If it is restricted to SSE, we can of course ensure relevant > > libgcc > > > functions are built with SSE enabled, and likewise in glibc if that gains > > > _Float16 functions, though maybe with some extra complications to get > > > relevant testcases to run whenever possible.) > > > > > > > _Float16 functions in libgcc should be compiled with SSE enabled. > > > > BTW, _Float16 software emulation may require more than just SSE > > since we need to do _Float16 load and store with XMM registers. > > There is no 16bit load/store for XMM registers without AVX512FP16. > > > > Umm, if you just need to load/store 16-bit scalars in XMM registers you can > use pextrw and pinsrw which don't require AVX. f16x8 can use any of the > standard full-register load/stores. It looks like that requires SSE2, with SSE only inserts/extracts to/from MMX regs are supported. But of course GPR half-word loads and GPR->XMM moves of full size would work. > https://gcc.godbolt.org/z/ncznr9TM1 > > Jacob