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mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=OQOU31fRynOMQUsHYB716sb5h5Jc+Ursw7ysWbCwKIc=; b=A8+oNEXrmOXJR9qnkCV1S2TVufVJaXV1EiXSNlfm4uqTNK7XYZyL+qZQzFs4T2rwhbCn64nQ/qJAvErsFVbafhzWl1fb6R52AISY0cGSuTfbDMS4LekWd57f3G2xgNNwPyGP6E+GAvZ1wCXRNOpf83ii7lHI/qpg4R3vRO+6Wts= From: Wilco Dijkstra To: Siddhesh Poyarekar , 'GNU C Library' Subject: Re: [PATCH][AArch64] Cleanup memset Date: Tue, 3 Mar 2020 14:42:22 +0000 Message-ID: References: , In-Reply-To: Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=Wilco.Dijkstra@arm.com; x-checkrecipientrouted: true x-ms-oob-tlc-oobclassifiers: OLM:9508;OLM:9508; X-Forefront-Antispam-Report-Untrusted: SFV:NSPM;SFS:(10009020)(4636009)(39860400002)(376002)(366004)(136003)(346002)(396003)(199004)(189003)(9686003)(8676002)(66556008)(8936002)(66946007)(5660300002)(66446008)(66476007)(64756008)(86362001)(52536014)(55016002)(316002)(6506007)(110136005)(26005)(71200400001)(81156014)(478600001)(7696005)(81166006)(33656002)(76116006)(186003)(2906002);DIR:OUT;SFP:1101;SCL:1;SRVR:AM5PR0801MB2052;H:AM5PR0801MB2035.eurprd08.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; 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X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM5EUR03FT023.eop-EUR03.prod.protection.outlook.com X-MS-Office365-Filtering-Correlation-Id-Prvs: d8c7173c-eaba-422a-a38a-08d7bf81150d Hi Siddhesh,=0A= =0A= > This looks OK in general, although can you please elaborate on the=0A= > following:=0A= >=0A= > - What cores did you test on to conclude that 160 is a better threshold= =0A= > than 256?=0A= =0A= I've mostly done testing on Neoverse N1, Cortex-A72 and Cortex-A53.=0A= (the latter seems to be always faster with DC ZVA disabled, so the threshol= d=0A= doesn't really matter). I wrote a random memset benchmark similar to the=0A= memcpy one, and performance is unchanged there given there is no change=0A= in the way small cases are handled.=0A= =0A= > - Is the intention to support non-64-byte zva sizes once there is actual= =0A= > hardware that implements it and not bother with it for now? I agree=0A= > with the idea if that's the case, just that it would be nice to have=0A= > that documented in the git commit message.=0A= =0A= Yes, otherwise it's hard to test or prove it helps performance after all. W= e've=0A= had issues with the non-64 ZVA sizes before, so it's best to keep it simple= .=0A= =0A= I'm also trying to reduce the amount of code and avoid unnecessary prolifer= ation=0A= of almost identical ifuncs. I think we can remove most of the memset ifuncs= ,=0A= it seems we need one version without ZVA and a ZVA version for size 64.=0A= =0A= Cheers,=0A= Wilco=