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([2601:681:8600:13d0::f0a]) by smtp.gmail.com with ESMTPSA id p128-20020a622986000000b00582cb9d9ad3sm9200974pfp.178.2023.01.10.21.07.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Jan 2023 21:07:41 -0800 (PST) Message-ID: <6d13e63f-69b3-6e48-b811-bbfcf3ffb3af@ventanamicro.com> Date: Tue, 10 Jan 2023 22:07:39 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.1 Subject: Re: Auto-enabling V unit and/or use of elf attributes (was Re: Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break) Content-Language: en-US To: Richard Henderson , Vineet Gupta , Kito Cheng Cc: Philipp Tomsich , Andy Chiu , Vincent Chen , Florian Weimer , Rich Felker , Andrew Waterman , Palmer Dabbelt , =?UTF-8?Q?Christoph_M=c3=bcllner?= , davidlt@rivosinc.com, Arnd Bergmann , =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= , Szabolcs Nagy , Greentime Hu , Aaron Durbin , Andrew de los Reyes , linux-riscv , GNU C Library References: <1631497278-29829-1-git-send-email-vincent.chen@sifive.com> <91ef3c45-165f-d2b3-7c77-322c01802c41@rivosinc.com> <18465ca3-934f-5b3e-170c-1ff0edea3a89@rivosinc.com> <1f8f1d21-4a19-54fe-8b29-bf9e2a8501d7@rivosinc.com> <3a838afe-974b-60bb-a0e5-83e366ec652e@rivosinc.com> <3923eeee-e4dc-0911-40bf-84c34aee962d@linaro.org> <119da65f-e976-f382-3fe1-1585be738352@ventanamicro.com> <8be4d673-f435-429e-9a61-bb49e7820529@linaro.org> From: Jeff Law In-Reply-To: <8be4d673-f435-429e-9a61-bb49e7820529@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces+e=80x24.org@sourceware.org Sender: "Libc-alpha" On 1/10/23 21:57, Richard Henderson wrote: > On 1/10/23 20:28, Jeff Law wrote: >> >> >> On 1/10/23 18:22, Richard Henderson wrote: >>> On 1/10/23 10:07, Vineet Gupta wrote: >>>> Yes bulk of glibc might not have vector code, but those V ifunc >>>> routines do and IMO this information needs to be recorded somewhere >>>> in the elf. Case in point being the current issue with how to enable >>>> V unit. Community wants a per-process enable, using an explicit >>>> prctl from userspace (since RV doesn't have fault-on-first use >>>> hardware mechanism unlike some of the other arches). But how does >>>> the glibc loader know to invoke prctl. We can't just rely on user >>>> env GLIBC_TUNABLE etc since that might not be accurate. It needs >>>> somethign concrete which IMO can come from elf attributes. If not, >>>> do you have suggestions on how to solve this issue ? >>> >>> Why not just fault on first use to enable?  That's vastly less >>> complicated than trying to plumb anything through elf resulting in a >>> prctl. >> Well, the answer is in Vineet's paragraph -- the hardware apparently >> doesn't have fault-on-first-use which is mighty unfortunate. > > Nonsense -- sstatus.vs stores {off, initial, clean, dirty} state, just > like fpu. > Now treat the vector unit just like fpu lazy migration. Then let's do something sensible. Manually enabling via prctl seems silly if we have fault on first use. jeff