* [Patch V2]: add hp-timing support and fix syscall.S
@ 2020-11-27 9:22 Huang Pei
2020-11-27 9:22 ` [PATCH 1/3] mips: add hp-timing support for MIPS R2 Huang Pei
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Huang Pei @ 2020-11-27 9:22 UTC (permalink / raw
To: Joseph Myers; +Cc: Huacai Chen, Chenghua Xu, libc-alpha
All patches are tested on debian 10 mips64el glibc-2.28 and master,
no regression found
add more discription about Patch 3, following Maciej's advice
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/3] mips: add hp-timing support for MIPS R2
2020-11-27 9:22 [Patch V2]: add hp-timing support and fix syscall.S Huang Pei
@ 2020-11-27 9:22 ` Huang Pei
2020-11-27 9:22 ` [PATCH 2/3] mips: make sp 16-byte aligned on N64/N32 Huang Pei
2020-11-27 9:22 ` [PATCH 3/3] mips: remove register spill Huang Pei
2 siblings, 0 replies; 10+ messages in thread
From: Huang Pei @ 2020-11-27 9:22 UTC (permalink / raw
To: Joseph Myers; +Cc: Huacai Chen, Chenghua Xu, libc-alpha
MIPS R2 only support 32 bit TSC(AKA "rdhwr %0, $2"), but it should be
enough for glibc
Signed-off-by: Huang Pei <huangpei@loongson.cn>
---
sysdeps/mips/hp-timing.h | 43 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 sysdeps/mips/hp-timing.h
diff --git a/sysdeps/mips/hp-timing.h b/sysdeps/mips/hp-timing.h
new file mode 100644
index 0000000000..128315d0bf
--- /dev/null
+++ b/sysdeps/mips/hp-timing.h
@@ -0,0 +1,43 @@
+/* High precision, low overhead timing functions. MIPS version.
+ Copyright (C) 2002-2020 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _HP_TIMING_H
+#define _HP_TIMING_H 1
+
+#if __mips_isa_rev >= 2
+/* We always assume having the timestamp register. */
+#define HP_TIMING_AVAIL (0)
+#define HP_SMALL_TIMING_AVAIL (1)
+
+/* We indeed have inlined functions. */
+#define HP_TIMING_INLINE (1)
+
+/* We use 32bit values for the times. */
+typedef unsigned int hp_timing_t;
+
+/* Read the cp0 count, this maybe inaccurate. */
+#define HP_TIMING_NOW(Var) \
+ ({ unsigned int _count; \
+ asm volatile ("rdhwr\t%0,$2" : "=r" (_count)); \
+ (Var) = _count; })
+
+#include <hp-timing-common.h>
+
+#endif
+
+#endif /* hp-timing.h */
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/3] mips: make sp 16-byte aligned on N64/N32
2020-11-27 9:22 [Patch V2]: add hp-timing support and fix syscall.S Huang Pei
2020-11-27 9:22 ` [PATCH 1/3] mips: add hp-timing support for MIPS R2 Huang Pei
@ 2020-11-27 9:22 ` Huang Pei
2020-11-27 9:22 ` [PATCH 3/3] mips: remove register spill Huang Pei
2 siblings, 0 replies; 10+ messages in thread
From: Huang Pei @ 2020-11-27 9:22 UTC (permalink / raw
To: Joseph Myers; +Cc: Huacai Chen, Chenghua Xu, libc-alpha
MIPS N64/N32 ABI request stack pointer be 16-byte alinged
Signed-off-by: Huang Pei <huangpei@loongson.cn>
---
sysdeps/unix/sysv/linux/mips/mips64/syscall.S | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
index a9baff3c17..aab1f389aa 100644
--- a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
+++ b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
@@ -27,10 +27,10 @@
.text
NESTED (syscall, SZREG, ra)
- .mask 0x00010000, -SZREG
+ .mask 0x00010000, -2 * SZREG
.fmask 0x00000000, 0
- PTR_ADDIU sp, -SZREG
- cfi_adjust_cfa_offset (SZREG)
+ PTR_ADDIU sp, -2 * SZREG
+ cfi_adjust_cfa_offset (2 * SZREG)
REG_S s0, (sp)
cfi_rel_offset (s0, 0)
@@ -48,8 +48,8 @@ NESTED (syscall, SZREG, ra)
REG_L s0, (sp)
cfi_restore (s0)
- PTR_ADDIU sp, SZREG
- cfi_adjust_cfa_offset (-SZREG)
+ PTR_ADDIU sp, 2 * SZREG
+ cfi_adjust_cfa_offset (-2 * 2 * SZREG)
bne a3, zero, L(error)
ret
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] mips: remove register spill
2020-11-27 9:22 [Patch V2]: add hp-timing support and fix syscall.S Huang Pei
2020-11-27 9:22 ` [PATCH 1/3] mips: add hp-timing support for MIPS R2 Huang Pei
2020-11-27 9:22 ` [PATCH 2/3] mips: make sp 16-byte aligned on N64/N32 Huang Pei
@ 2020-11-27 9:22 ` Huang Pei
2 siblings, 0 replies; 10+ messages in thread
From: Huang Pei @ 2020-11-27 9:22 UTC (permalink / raw
To: Joseph Myers; +Cc: Huacai Chen, Chenghua Xu, libc-alpha
Before Linux/MIPS 2.6.36, kernel expected setting syscall number(aka
"li v0, #sys_number") right precedes "syscall", so the kernel syscall
restart sequence can use CP0 EPC - 4 to restart the syscall, because
kernel DID NOT save v0 during syscall handling. Linux 2.6.36 canceled
this restriction.
See sysdeps/unix/sysv/linux/mips/{mips32/sysdep.h,mips64/sysdep.h,sysdep.h}
Since glibc-2.24 the minimum kernel version is 3.2(much higer than
2.6.36), I think it is OK to remove the ugly register spill in
syscall.S just because the old convention
Signed-off-by: Huang Pei <huangpei@loongson.cn>
---
sysdeps/unix/sysv/linux/mips/mips64/syscall.S | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
index aab1f389aa..089524a40b 100644
--- a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
+++ b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
@@ -27,14 +27,9 @@
.text
NESTED (syscall, SZREG, ra)
- .mask 0x00010000, -2 * SZREG
+ .mask 0x00000000, 0
.fmask 0x00000000, 0
- PTR_ADDIU sp, -2 * SZREG
- cfi_adjust_cfa_offset (2 * SZREG)
- REG_S s0, (sp)
- cfi_rel_offset (s0, 0)
-
- move s0, a0
+ move v0, a0
move a0, a1 /* shift arg1 - arg7. */
move a1, a2
move a2, a3
@@ -43,13 +38,8 @@ NESTED (syscall, SZREG, ra)
move a5, a6
move a6, a7
- move v0, s0 /* Syscall number -> v0 */
syscall /* Do the system call. */
- REG_L s0, (sp)
- cfi_restore (s0)
- PTR_ADDIU sp, 2 * SZREG
- cfi_adjust_cfa_offset (-2 * 2 * SZREG)
bne a3, zero, L(error)
ret
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] mips: remove register spill
2020-11-28 8:18 [Patch V3]: add hp-timing support and minor fix Huang Pei
@ 2020-11-28 8:18 ` Huang Pei
2020-11-30 14:22 ` Adhemerval Zanella via Libc-alpha
0 siblings, 1 reply; 10+ messages in thread
From: Huang Pei @ 2020-11-28 8:18 UTC (permalink / raw
To: Joseph Myers; +Cc: Huacai Chen, Chenghua Xu, libc-alpha
Before Linux/MIPS 2.6.36, kernel expected setting syscall number(aka
"li v0, #sys_number") right precedes "syscall", so the kernel syscall
restart sequence can use CP0 EPC - 4 to restart the syscall, because
kernel DID NOT save v0 during syscall handling. Linux 2.6.36 canceled
this restriction.
See sysdeps/unix/sysv/linux/mips/{mips32/sysdep.h,mips64/sysdep.h,sysdep.h}
Since glibc-2.24 the minimum kernel version is 3.2(much higer than
2.6.36), I think it is OK to remove the ugly register spill in
syscall.S just because of the old convention
Signed-off-by: Huang Pei <huangpei@loongson.cn>
---
sysdeps/unix/sysv/linux/mips/mips64/syscall.S | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
index aab1f389aa..089524a40b 100644
--- a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
+++ b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
@@ -27,14 +27,9 @@
.text
NESTED (syscall, SZREG, ra)
- .mask 0x00010000, -2 * SZREG
+ .mask 0x00000000, 0
.fmask 0x00000000, 0
- PTR_ADDIU sp, -2 * SZREG
- cfi_adjust_cfa_offset (2 * SZREG)
- REG_S s0, (sp)
- cfi_rel_offset (s0, 0)
-
- move s0, a0
+ move v0, a0
move a0, a1 /* shift arg1 - arg7. */
move a1, a2
move a2, a3
@@ -43,13 +38,8 @@ NESTED (syscall, SZREG, ra)
move a5, a6
move a6, a7
- move v0, s0 /* Syscall number -> v0 */
syscall /* Do the system call. */
- REG_L s0, (sp)
- cfi_restore (s0)
- PTR_ADDIU sp, 2 * SZREG
- cfi_adjust_cfa_offset (-2 * 2 * SZREG)
bne a3, zero, L(error)
ret
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] mips: remove register spill
2020-11-28 8:18 ` [PATCH 3/3] mips: remove register spill Huang Pei
@ 2020-11-30 14:22 ` Adhemerval Zanella via Libc-alpha
2020-12-01 9:39 ` Huang Pei
0 siblings, 1 reply; 10+ messages in thread
From: Adhemerval Zanella via Libc-alpha @ 2020-11-30 14:22 UTC (permalink / raw
To: Huang Pei, Joseph Myers; +Cc: Huacai Chen, Chenghua Xu, libc-alpha
On 28/11/2020 05:18, Huang Pei wrote:
> Before Linux/MIPS 2.6.36, kernel expected setting syscall number(aka
> "li v0, #sys_number") right precedes "syscall", so the kernel syscall
> restart sequence can use CP0 EPC - 4 to restart the syscall, because
> kernel DID NOT save v0 during syscall handling. Linux 2.6.36 canceled
> this restriction.
>
> See sysdeps/unix/sysv/linux/mips/{mips32/sysdep.h,mips64/sysdep.h,sysdep.h}
>
> Since glibc-2.24 the minimum kernel version is 3.2(much higer than
> 2.6.36), I think it is OK to remove the ugly register spill in
> syscall.S just because of the old convention
>
> Signed-off-by: Huang Pei <huangpei@loongson.cn>
We do not use SCO, but rather Copyright assignment.
The rest of the patch looks ok.
> ---
> sysdeps/unix/sysv/linux/mips/mips64/syscall.S | 14 ++------------
> 1 file changed, 2 insertions(+), 12 deletions(-)
>
> diff --git a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
> index aab1f389aa..089524a40b 100644
> --- a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
> +++ b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
> @@ -27,14 +27,9 @@
>
> .text
> NESTED (syscall, SZREG, ra)
> - .mask 0x00010000, -2 * SZREG
> + .mask 0x00000000, 0
> .fmask 0x00000000, 0
> - PTR_ADDIU sp, -2 * SZREG
> - cfi_adjust_cfa_offset (2 * SZREG)
> - REG_S s0, (sp)
> - cfi_rel_offset (s0, 0)
> -
> - move s0, a0
> + move v0, a0
> move a0, a1 /* shift arg1 - arg7. */
> move a1, a2
> move a2, a3
> @@ -43,13 +38,8 @@ NESTED (syscall, SZREG, ra)
> move a5, a6
> move a6, a7
>
> - move v0, s0 /* Syscall number -> v0 */
> syscall /* Do the system call. */
>
> - REG_L s0, (sp)
> - cfi_restore (s0)
> - PTR_ADDIU sp, 2 * SZREG
> - cfi_adjust_cfa_offset (-2 * 2 * SZREG)
> bne a3, zero, L(error)
>
> ret
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] mips: remove register spill
2020-11-30 14:22 ` Adhemerval Zanella via Libc-alpha
@ 2020-12-01 9:39 ` Huang Pei
2020-12-01 11:58 ` Adhemerval Zanella via Libc-alpha
0 siblings, 1 reply; 10+ messages in thread
From: Huang Pei @ 2020-12-01 9:39 UTC (permalink / raw
To: Adhemerval Zanella; +Cc: Huacai Chen, Chenghua Xu, libc-alpha, Joseph Myers
hi,
On Mon, Nov 30, 2020 at 11:22:03AM -0300, Adhemerval Zanella wrote:
>
>
> On 28/11/2020 05:18, Huang Pei wrote:
> > Before Linux/MIPS 2.6.36, kernel expected setting syscall number(aka
> > "li v0, #sys_number") right precedes "syscall", so the kernel syscall
> > restart sequence can use CP0 EPC - 4 to restart the syscall, because
> > kernel DID NOT save v0 during syscall handling. Linux 2.6.36 canceled
> > this restriction.
> >
> > See sysdeps/unix/sysv/linux/mips/{mips32/sysdep.h,mips64/sysdep.h,sysdep.h}
> >
> > Since glibc-2.24 the minimum kernel version is 3.2(much higer than
> > 2.6.36), I think it is OK to remove the ugly register spill in
> > syscall.S just because of the old convention
> >
> > Signed-off-by: Huang Pei <huangpei@loongson.cn>
>
> We do not use SCO, but rather Copyright assignment.
>
> The rest of the patch looks ok.
>
I would like to combine the Patch 2/3 and Patch 3/3 into one patch,
since Patch 2/3 only fix sp alignment, but the key point is folllowing syscall
restart convention, any advice?
> > ---
> > sysdeps/unix/sysv/linux/mips/mips64/syscall.S | 14 ++------------
> > 1 file changed, 2 insertions(+), 12 deletions(-)
> >
> > diff --git a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
> > index aab1f389aa..089524a40b 100644
> > --- a/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
> > +++ b/sysdeps/unix/sysv/linux/mips/mips64/syscall.S
> > @@ -27,14 +27,9 @@
> >
> > .text
> > NESTED (syscall, SZREG, ra)
> > - .mask 0x00010000, -2 * SZREG
> > + .mask 0x00000000, 0
> > .fmask 0x00000000, 0
> > - PTR_ADDIU sp, -2 * SZREG
> > - cfi_adjust_cfa_offset (2 * SZREG)
> > - REG_S s0, (sp)
> > - cfi_rel_offset (s0, 0)
> > -
> > - move s0, a0
> > + move v0, a0
> > move a0, a1 /* shift arg1 - arg7. */
> > move a1, a2
> > move a2, a3
> > @@ -43,13 +38,8 @@ NESTED (syscall, SZREG, ra)
> > move a5, a6
> > move a6, a7
> >
> > - move v0, s0 /* Syscall number -> v0 */
> > syscall /* Do the system call. */
> >
> > - REG_L s0, (sp)
> > - cfi_restore (s0)
> > - PTR_ADDIU sp, 2 * SZREG
> > - cfi_adjust_cfa_offset (-2 * 2 * SZREG)
> > bne a3, zero, L(error)
> >
> > ret
> >
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] mips: remove register spill
2020-12-01 9:39 ` Huang Pei
@ 2020-12-01 11:58 ` Adhemerval Zanella via Libc-alpha
2020-12-04 11:03 ` Maciej W. Rozycki
0 siblings, 1 reply; 10+ messages in thread
From: Adhemerval Zanella via Libc-alpha @ 2020-12-01 11:58 UTC (permalink / raw
To: Huang Pei; +Cc: Huacai Chen, Chenghua Xu, libc-alpha, Joseph Myers
On 01/12/2020 06:39, Huang Pei wrote:
> hi,
>
> On Mon, Nov 30, 2020 at 11:22:03AM -0300, Adhemerval Zanella wrote:
>>
>>
>> On 28/11/2020 05:18, Huang Pei wrote:
>>> Before Linux/MIPS 2.6.36, kernel expected setting syscall number(aka
>>> "li v0, #sys_number") right precedes "syscall", so the kernel syscall
>>> restart sequence can use CP0 EPC - 4 to restart the syscall, because
>>> kernel DID NOT save v0 during syscall handling. Linux 2.6.36 canceled
>>> this restriction.
>>>
>>> See sysdeps/unix/sysv/linux/mips/{mips32/sysdep.h,mips64/sysdep.h,sysdep.h}
>>>
>>> Since glibc-2.24 the minimum kernel version is 3.2(much higer than
>>> 2.6.36), I think it is OK to remove the ugly register spill in
>>> syscall.S just because of the old convention
>>>
>>> Signed-off-by: Huang Pei <huangpei@loongson.cn>
>>
>> We do not use SCO, but rather Copyright assignment.
>>
>> The rest of the patch looks ok.
>>
>
> I would like to combine the Patch 2/3 and Patch 3/3 into one patch,
> since Patch 2/3 only fix sp alignment, but the key point is folllowing syscall
> restart convention, any advice?
Send a v2 with the patches merged and the hp-inline fix.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] mips: remove register spill
2020-12-01 11:58 ` Adhemerval Zanella via Libc-alpha
@ 2020-12-04 11:03 ` Maciej W. Rozycki
2020-12-04 12:33 ` Adhemerval Zanella via Libc-alpha
0 siblings, 1 reply; 10+ messages in thread
From: Maciej W. Rozycki @ 2020-12-04 11:03 UTC (permalink / raw
To: Adhemerval Zanella
Cc: Huacai Chen, Chenghua Xu, libc-alpha, Huang Pei, Joseph Myers
On Tue, 1 Dec 2020, Adhemerval Zanella via Libc-alpha wrote:
> > I would like to combine the Patch 2/3 and Patch 3/3 into one patch,
> > since Patch 2/3 only fix sp alignment, but the key point is folllowing syscall
> > restart convention, any advice?
>
> Send a v2 with the patches merged and the hp-inline fix.
I would defer the removal of the old syscall restart convention in this
single place only. I don't think we need to introduce such a mess.
Instead an audit should be made and all the places adjusted with a single
change. That would include at least MIPS16 wrappers, and IIRC some
microMIPS support code, and then the comment I referred previously needs
to be adjusted accordingly (maybe removed altogether even).
Maciej
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] mips: remove register spill
2020-12-04 11:03 ` Maciej W. Rozycki
@ 2020-12-04 12:33 ` Adhemerval Zanella via Libc-alpha
0 siblings, 0 replies; 10+ messages in thread
From: Adhemerval Zanella via Libc-alpha @ 2020-12-04 12:33 UTC (permalink / raw
To: Maciej W. Rozycki
Cc: Huacai Chen, Chenghua Xu, libc-alpha, Huang Pei, Joseph Myers
On 04/12/2020 08:03, Maciej W. Rozycki wrote:
> On Tue, 1 Dec 2020, Adhemerval Zanella via Libc-alpha wrote:
>
>>> I would like to combine the Patch 2/3 and Patch 3/3 into one patch,
>>> since Patch 2/3 only fix sp alignment, but the key point is folllowing syscall
>>> restart convention, any advice?
>>
>> Send a v2 with the patches merged and the hp-inline fix.
>
> I would defer the removal of the old syscall restart convention in this
> single place only. I don't think we need to introduce such a mess.
>
> Instead an audit should be made and all the places adjusted with a single
> change. That would include at least MIPS16 wrappers, and IIRC some
> microMIPS support code, and then the comment I referred previously needs
> to be adjusted accordingly (maybe removed altogether even).
>
> Maciej
Alright, it seems better indeed.
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-12-04 12:33 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
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2020-11-27 9:22 [Patch V2]: add hp-timing support and fix syscall.S Huang Pei
2020-11-27 9:22 ` [PATCH 1/3] mips: add hp-timing support for MIPS R2 Huang Pei
2020-11-27 9:22 ` [PATCH 2/3] mips: make sp 16-byte aligned on N64/N32 Huang Pei
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