From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on dcvr.yhbt.net X-Spam-Level: X-Spam-Status: No, score=-4.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, SPF_HELO_PASS,SPF_PASS shortcircuit=no autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by dcvr.yhbt.net (Postfix) with ESMTPS id 5F7F11F4B4 for ; Mon, 12 Oct 2020 13:26:56 +0000 (UTC) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8126A388A424; Mon, 12 Oct 2020 13:26:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8126A388A424 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1602509215; bh=GISk2nClDhyxmIGmN0h0bnDuWe2TJIxj5CWjv2eAQZE=; h=Date:To:Subject:References:In-Reply-To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=J7oZ93zIcFdc+zdY/4FuchXv5+xzYV0cz8CJX+8nBZqBBZKuJpR8XxeWFzPI8IrIz s7JMMdHFRrhTYyp0Ie84/sXi6H3szqief8f22YD2T0SlIxEz99qNqNccJtxetO2DdV lWPzjJOjeKPp5AG75xXMHnipYpy6gpNL1PDk/AkM= Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 75D483857C45 for ; Mon, 12 Oct 2020 13:26:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 75D483857C45 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 03B1BD6E; Mon, 12 Oct 2020 06:26:44 -0700 (PDT) Received: from arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 051B93F66B; Mon, 12 Oct 2020 06:26:41 -0700 (PDT) Date: Mon, 12 Oct 2020 14:26:39 +0100 To: "Bae, Chang Seok" Subject: Re: [RFC PATCH 1/4] x86/signal: Introduce helpers to get the maximum signal frame size Message-ID: <20201012132638.GC32292@arm.com> References: <20200929205746.6763-1-chang.seok.bae@intel.com> <20200929205746.6763-2-chang.seok.bae@intel.com> <20201005134230.GS6642@arm.com> <74ca7e8a61f051eadc895cf8b29e591cc3d0f548.camel@intel.com> <20201007100558.GE6642@arm.com> <20ae46ae9b74036723ff7b9f731374f78536dc88.camel@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20ae46ae9b74036723ff7b9f731374f78536dc88.camel@intel.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Dave Martin via Libc-alpha Reply-To: Dave Martin Cc: "linux-arch@vger.kernel.org" , "Luck, Tony" , "libc-alpha@sourceware.org" , "Brown, Len" , "Shankar, Ravi V" , "linux-api@vger.kernel.org" , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "Hansen, Dave" , "luto@kernel.org" , "tglx@linutronix.de" , "bp@suse.de" , "mingo@kernel.org" Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" On Thu, Oct 08, 2020 at 10:43:50PM +0000, Bae, Chang Seok wrote: > On Wed, 2020-10-07 at 11:05 +0100, Dave Martin wrote: > > On Tue, Oct 06, 2020 at 05:45:24PM +0000, Bae, Chang Seok wrote: > > > On Mon, 2020-10-05 at 14:42 +0100, Dave Martin wrote: > > > > On Tue, Sep 29, 2020 at 01:57:43PM -0700, Chang S. Bae wrote: > > > > > > > > > > +/* > > > > > + * The FP state frame contains an XSAVE buffer which must be 64-byte aligned. > > > > > + * If a signal frame starts at an unaligned address, extra space is required. > > > > > + * This is the max alignment padding, conservatively. > > > > > + */ > > > > > +#define MAX_XSAVE_PADDING 63UL > > > > > + > > > > > +/* > > > > > + * The frame data is composed of the following areas and laid out as: > > > > > + * > > > > > + * ------------------------- > > > > > + * | alignment padding | > > > > > + * ------------------------- > > > > > + * | (f)xsave frame | > > > > > + * ------------------------- > > > > > + * | fsave header | > > > > > + * ------------------------- > > > > > + * | siginfo + ucontext | > > > > > + * ------------------------- > > > > > + */ > > > > > + > > > > > +/* max_frame_size tells userspace the worst case signal stack size. */ > > > > > +static unsigned long __ro_after_init max_frame_size; > > > > > + > > > > > +void __init init_sigframe_size(void) > > > > > +{ > > > > > + /* > > > > > + * Use the largest of possible structure formats. This might > > > > > + * slightly oversize the frame for 64-bit apps. > > > > > + */ > > > > > + > > > > > + if (IS_ENABLED(CONFIG_X86_32) || > > > > > + IS_ENABLED(CONFIG_IA32_EMULATION)) > > > > > + max_frame_size = max((unsigned long)SIZEOF_sigframe_ia32, > > > > > + (unsigned long)SIZEOF_rt_sigframe_ia32); > > > > > + > > > > > + if (IS_ENABLED(CONFIG_X86_X32_ABI)) > > > > > + max_frame_size = max(max_frame_size, (unsigned long)SIZEOF_rt_sigframe_x32); > > > > > + > > > > > + if (IS_ENABLED(CONFIG_X86_64)) > > > > > + max_frame_size = max(max_frame_size, (unsigned long)SIZEOF_rt_sigframe); > > > > > + > > > > > + max_frame_size += fpu__get_fpstate_sigframe_size() + MAX_XSAVE_PADDING; > > > > > > > > For arm64, we round the worst-case padding up by one. > > > > > > > > > > Yeah, I saw that. The ARM code adds the max padding, too: > > > > > > signal_minsigstksz = sigframe_size(&user) + > > > round_up(sizeof(struct frame_record), 16) + > > > 16; /* max alignment padding */ > > > > > > > > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/kernel/signal.c#n973 > > > > > > > I can't remember the full rationale for this, but it at least seemed a > > > > bit weird to report a size that is not a multiple of the alignment. > > > > > > > > > > Because the last state size of XSAVE may not be 64B aligned, the (reported) > > > sum of xstate size here does not guarantee 64B alignment. > > > > > > > I'm can't think of a clear argument as to why it really matters, though. > > > > > > We care about the start of XSAVE buffer for the XSAVE instructions, to be > > > 64B-aligned. > > > > Ah, I see. That makes sense. > > > > For arm64, there is no additional alignment padding inside the frame, > > only the padding inserted after the frame to ensure that the base > > address is 16-byte aligned. > > > > However, I wonder whether people will tend to assume that AT_MINSIGSTKSZ > > is a sensible (if minimal) amount of stack to allocate. Allocating an > > odd number of bytes, or any amount that isn't a multiple of the > > architecture's preferred (or mandated) stack alignment probably doesn't > > make sense. > > > > AArch64 has a mandatory stack alignment of 16 bytes; I'm not sure about > > x86. > > The x86 ABI looks to require 16-byte alignment (for both 32-/64-bit modes). > FWIW, the 32-bit ABI got changed from 4-byte alignement. > > Thank you for brining up the point. Ack. The kernel is expected to return a > 16-byte aligned size. I made this change after a discussion with H.J.: > > diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c > index c042236ef52e..52815d7c08fb 100644 > --- a/arch/x86/kernel/signal.c > +++ b/arch/x86/kernel/signal.c > @@ -212,6 +212,11 @@ do { > \ > * Set up a signal frame. > */ > > +/* x86 ABI requires 16-byte alignment */ > +#define FRAME_ALIGNMENT 16UL > + > +#define MAX_FRAME_PADDING FRAME_ALIGNMENT - 1 > + You might want () here, to avoid future surpsises. > /* > * Determine which stack to use.. > */ > @@ -222,9 +227,9 @@ static unsigned long align_sigframe(unsigned long sp) > * Align the stack pointer according to the i386 ABI, > * i.e. so that on function entry ((sp + 4) & 15) == 0. > */ > - sp = ((sp + 4) & -16ul) - 4; > + sp = ((sp + 4) & -FRAME_ALIGNMENT) - 4; > #else /* !CONFIG_X86_32 */ > - sp = round_down(sp, 16) - 8; > + sp = round_down(sp, FRAME_ALIGNMENT) - 8; > #endif > return sp; > } > @@ -404,7 +409,7 @@ static int __setup_rt_frame(int sig, struct ksignal > *ksig, > unsafe_put_sigcontext(&frame->uc.uc_mcontext, fp, regs, set, > Efault); > unsafe_put_sigmask(set, frame, Efault); > user_access_end(); > - > + > if (copy_siginfo_to_user(&frame->info, &ksig->info)) > return -EFAULT; > > @@ -685,6 +690,8 @@ SYSCALL_DEFINE0(rt_sigreturn) > * ------------------------- > * | fsave header | > * ------------------------- > + * | alignment padding | > + * ------------------------- > * | siginfo + ucontext | > * ------------------------- > */ > @@ -710,7 +717,12 @@ void __init init_sigframe_size(void) > if (IS_ENABLED(CONFIG_X86_64)) > max_frame_size = max(max_frame_size, (unsigned > long)SIZEOF_rt_sigframe); > > + max_frame_size += MAX_FRAME_PADDING; > + > max_frame_size += fpu__get_fpstate_sigframe_size() + > MAX_XSAVE_PADDING; > + > + /* Userspace expects an aligned size. */ > + max_frame_size = round_up(max_frame_size, FRAME_ALIGNMENT); > } [...] Seems reasonable, I guess. (I won't comment on the x86 ABI specifics.) Cheers ---Dave