* [PATCH] x86: Rename Intel CPU feature names
@ 2020-08-05 16:30 H.J. Lu via Libc-alpha
0 siblings, 0 replies; only message in thread
From: H.J. Lu via Libc-alpha @ 2020-08-05 16:30 UTC (permalink / raw)
To: libc-alpha
Intel64 and IA-32 Architectures Software Developer’s Manual has changed
the following CPU feature names:
1. The CPU feature of Enhanced Intel SpeedStep Technology is renamed
from EST to EIST.
2. The CPU feature which supports Platform Quality of Service Monitoring
(PQM) capability is changed to Intel Resource Director Technology
(Intel RDT) Monitoring capability, i.e. PQM is renamed to RDT_M.
3. The CPU feature which supports Platform Quality of Service
Enforcement (PQE) capability is changed to Intel Resource Director
Technology (Intel RDT) Allocation capability, i.e. PQE is renamed to
RDT_A.
---
sysdeps/x86/cpu-features.h | 18 +++++++++---------
sysdeps/x86/tst-get-cpu-features.c | 12 ++++++------
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
index a0b9b9177c..78fcec251e 100644
--- a/sysdeps/x86/cpu-features.h
+++ b/sysdeps/x86/cpu-features.h
@@ -156,7 +156,7 @@ extern const struct cpu_features *__get_cpu_features (void)
#define bit_cpu_DS_CPL (1u << 4)
#define bit_cpu_VMX (1u << 5)
#define bit_cpu_SMX (1u << 6)
-#define bit_cpu_EST (1u << 7)
+#define bit_cpu_EIST (1u << 7)
#define bit_cpu_TM2 (1u << 8)
#define bit_cpu_SSSE3 (1u << 9)
#define bit_cpu_CNXT_ID (1u << 10)
@@ -231,10 +231,10 @@ extern const struct cpu_features *__get_cpu_features (void)
#define bit_cpu_ERMS (1u << 9)
#define bit_cpu_INVPCID (1u << 10)
#define bit_cpu_RTM (1u << 11)
-#define bit_cpu_PQM (1u << 12)
+#define bit_cpu_RDT_M (1u << 12)
#define bit_cpu_DEPR_FPU_CS_DS (1u << 13)
#define bit_cpu_MPX (1u << 14)
-#define bit_cpu_PQE (1u << 15)
+#define bit_cpu_RDT_A (1u << 15)
#define bit_cpu_AVX512F (1u << 16)
#define bit_cpu_AVX512DQ (1u << 17)
#define bit_cpu_RDSEED (1u << 18)
@@ -371,7 +371,7 @@ extern const struct cpu_features *__get_cpu_features (void)
#define index_cpu_DS_CPL COMMON_CPUID_INDEX_1
#define index_cpu_VMX COMMON_CPUID_INDEX_1
#define index_cpu_SMX COMMON_CPUID_INDEX_1
-#define index_cpu_EST COMMON_CPUID_INDEX_1
+#define index_cpu_EIST COMMON_CPUID_INDEX_1
#define index_cpu_TM2 COMMON_CPUID_INDEX_1
#define index_cpu_SSSE3 COMMON_CPUID_INDEX_1
#define index_cpu_CNXT_ID COMMON_CPUID_INDEX_1
@@ -446,10 +446,10 @@ extern const struct cpu_features *__get_cpu_features (void)
#define index_cpu_ERMS COMMON_CPUID_INDEX_7
#define index_cpu_INVPCID COMMON_CPUID_INDEX_7
#define index_cpu_RTM COMMON_CPUID_INDEX_7
-#define index_cpu_PQM COMMON_CPUID_INDEX_7
+#define index_cpu_RDT_M COMMON_CPUID_INDEX_7
#define index_cpu_DEPR_FPU_CS_DS COMMON_CPUID_INDEX_7
#define index_cpu_MPX COMMON_CPUID_INDEX_7
-#define index_cpu_PQE COMMON_CPUID_INDEX_7
+#define index_cpu_RDT_A COMMON_CPUID_INDEX_7
#define index_cpu_AVX512F COMMON_CPUID_INDEX_7
#define index_cpu_AVX512DQ COMMON_CPUID_INDEX_7
#define index_cpu_RDSEED COMMON_CPUID_INDEX_7
@@ -584,7 +584,7 @@ extern const struct cpu_features *__get_cpu_features (void)
#define reg_DS_CPL ecx
#define reg_VMX ecx
#define reg_SMX ecx
-#define reg_EST ecx
+#define reg_EIST ecx
#define reg_TM2 ecx
#define reg_SSSE3 ecx
#define reg_CNXT_ID ecx
@@ -659,10 +659,10 @@ extern const struct cpu_features *__get_cpu_features (void)
#define reg_ERMS ebx
#define reg_INVPCID ebx
#define reg_RTM ebx
-#define reg_PQM ebx
+#define reg_RDT_M ebx
#define reg_DEPR_FPU_CS_DS ebx
#define reg_MPX ebx
-#define reg_PQE ebx
+#define reg_RDT_A ebx
#define reg_AVX512F ebx
#define reg_AVX512DQ ebx
#define reg_RDSEED ebx
diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
index 080c58e70b..6bfdef0829 100644
--- a/sysdeps/x86/tst-get-cpu-features.c
+++ b/sysdeps/x86/tst-get-cpu-features.c
@@ -75,7 +75,7 @@ do_test (void)
CHECK_CPU_FEATURE (DS_CPL);
CHECK_CPU_FEATURE (VMX);
CHECK_CPU_FEATURE (SMX);
- CHECK_CPU_FEATURE (EST);
+ CHECK_CPU_FEATURE (EIST);
CHECK_CPU_FEATURE (TM2);
CHECK_CPU_FEATURE (SSSE3);
CHECK_CPU_FEATURE (CNXT_ID);
@@ -138,10 +138,10 @@ do_test (void)
CHECK_CPU_FEATURE (ERMS);
CHECK_CPU_FEATURE (INVPCID);
CHECK_CPU_FEATURE (RTM);
- CHECK_CPU_FEATURE (PQM);
+ CHECK_CPU_FEATURE (RDT_M);
CHECK_CPU_FEATURE (DEPR_FPU_CS_DS);
CHECK_CPU_FEATURE (MPX);
- CHECK_CPU_FEATURE (PQE);
+ CHECK_CPU_FEATURE (RDT_A);
CHECK_CPU_FEATURE (AVX512F);
CHECK_CPU_FEATURE (AVX512DQ);
CHECK_CPU_FEATURE (RDSEED);
@@ -228,7 +228,7 @@ do_test (void)
CHECK_CPU_FEATURE_USABLE (DS_CPL);
CHECK_CPU_FEATURE_USABLE (VMX);
CHECK_CPU_FEATURE_USABLE (SMX);
- CHECK_CPU_FEATURE_USABLE (EST);
+ CHECK_CPU_FEATURE_USABLE (EIST);
CHECK_CPU_FEATURE_USABLE (TM2);
CHECK_CPU_FEATURE_USABLE (SSSE3);
CHECK_CPU_FEATURE_USABLE (CNXT_ID);
@@ -291,10 +291,10 @@ do_test (void)
CHECK_CPU_FEATURE_USABLE (ERMS);
CHECK_CPU_FEATURE_USABLE (INVPCID);
CHECK_CPU_FEATURE_USABLE (RTM);
- CHECK_CPU_FEATURE_USABLE (PQM);
+ CHECK_CPU_FEATURE_USABLE (RDT_M);
CHECK_CPU_FEATURE_USABLE (DEPR_FPU_CS_DS);
CHECK_CPU_FEATURE_USABLE (MPX);
- CHECK_CPU_FEATURE_USABLE (PQE);
+ CHECK_CPU_FEATURE_USABLE (RDT_A);
CHECK_CPU_FEATURE_USABLE (AVX512F);
CHECK_CPU_FEATURE_USABLE (AVX512DQ);
CHECK_CPU_FEATURE_USABLE (RDSEED);
--
2.26.2
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2020-08-05 16:30 [PATCH] x86: Rename Intel CPU feature names H.J. Lu via Libc-alpha
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