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Thu, 18 Jun 2020 12:22:16 +0000 Date: Thu, 18 Jun 2020 13:22:14 +0100 From: Szabolcs Nagy To: Joseph Myers Subject: Re: [PATCH glibc 1/3] glibc: Perform rseq registration at C startup and thread creation (v20) Message-ID: <20200618122213.GQ4066@arm.com> References: <20200527185130.5604-1-mathieu.desnoyers@efficios.com> <20200527185130.5604-2-mathieu.desnoyers@efficios.com> <87d06gxsla.fsf@oldenburg2.str.redhat.com> <188671972.53608.1591269056445.JavaMail.zimbra@efficios.com> <419546979.1229.1591897672174.JavaMail.zimbra@efficios.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-ClientProxiedBy: LO2P265CA0228.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:b::24) To AM6PR08MB3047.eurprd08.prod.outlook.com (2603:10a6:209:4c::23) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from arm.com (217.140.106.53) by LO2P265CA0228.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:b::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3109.22 via Frontend Transport; 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X-Microsoft-Antispam-Message-Info: XsiEojYyOziF6b3IAdzrapzdTQB6i1YVhdlQOnjeGgA1IZBCqwd1NMdKn2/QByUQaCR/xDG8JKHtokNFvi8UjmGAPdv4vDR8HbtOXR9A6UKZhFE0k7EDmzPekOZSJr1G/FITzIux6TtKGTArA7iAOvhsew3xT9uPeNx+s1DCgOI4guxReI7bF4yrj1hu32gDxCoiSN5r1D7yAjXuEVVrITwp55mmqY6lFJOmz7h6nAXbSxPdobjzO2SQyxVAGVA/5HEu53roXELIodOo4LcmgHksp54ybKI3iw73Jdlkl/2x6BubhoBkC1kJxgot9zXzPtD4IXTfuoLdJZCwll155izgyrlUEHNIBml6VUJqhLOCaS0eNk/7M8RZcbz/5qcbbacXMQlvgdOLfjYEOumNlyDbIVkFSzcSqwibbcMC1isIFvAAReXkHeoMPbxolN7T4m91zxgONMeAHa338ZUbOhMMhfGIjt+vWf1LsO4L7n0= X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jun 2020 12:22:24.2712 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6b035777-e6b7-41c7-3674-08d8138241c1 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB4991 X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Florian Weimer , Rich Felker , libc-alpha , Peter Zijlstra , linux-api , Boqun Feng , Will Deacon , linux-kernel , Ben Maurer , Mathieu Desnoyers , Michael Kerrisk , Dave Watson , Thomas Gleixner , Paul , Paul Turner Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" The 06/11/2020 20:26, Joseph Myers wrote: > On Thu, 11 Jun 2020, Mathieu Desnoyers wrote: > > I managed to get a repository up and running for librseq, and have integrated > > the rseq.2 man page with comments from Michael Kerrisk here: > > > > https://git.kernel.org/pub/scm/libs/librseq/librseq.git/tree/doc/man/rseq.2 > > > > Is that a suitable URL ? Can we simply point to it from glibc's manual ? > > Yes, that seems something reasonable to link to. is there work to make the usage of rseq critical sections portable? (e.g. transactional memory critical section has syntax in gcc, but that doesn't require straight line code with begin/end/abort labels in a particular layout.) the macros and inline asm in rseq-*.h are not too nice, but if they can completely hide the non-portable bits then i guess that works.