From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on dcvr.yhbt.net X-Spam-Level: X-Spam-ASN: AS31976 209.132.180.0/23 X-Spam-Status: No, score=-4.0 required=3.0 tests=AWL,BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_PASS,SPF_PASS shortcircuit=no autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dcvr.yhbt.net (Postfix) with ESMTPS id 4F95F1F462 for ; Fri, 14 Jun 2019 18:34:54 +0000 (UTC) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:from:to:cc:subject:message-id:references :mime-version:content-type:in-reply-to; q=dns; s=default; b=lfXO Xvq/vbMhQvOmWiCyTTFYtk2/qccBBJwJD/5qoCdnP40Ks59hbgAfev/HaXzkYyWi Y2tEjZEzK+rC18vpSEqn59w1k8Jj9m5/eK1qWo1d61NvW3Wu87hdcU9lqtf2l2TC Sgm3BEZfWdlgb7Qpu6ATBCjZGI0xbraz0fiDnjI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:from:to:cc:subject:message-id:references :mime-version:content-type:in-reply-to; s=default; bh=mKyDF6m4nK OUW8B+7KqEmCbkcDU=; b=KN/rBNnicQEXKHw+NHbTCP3mOFypMmEg7p1AeXqRUU ne6WuS0ef6b3tc4jLuKIt/IM9Zl5/kTeSCTQqxCEmKgiXDcxkOB8Xoj4Qg9oD4zo Vpe/oY7NlEe+HnO7ReKlvrgVa+QcZ4RfkOkhyi63JnQKAumJdbRsx4sN/P/wgzhG c= Received: (qmail 114707 invoked by alias); 14 Jun 2019 18:34:51 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 114697 invoked by uid 89); 14 Jun 2019 18:34:51 -0000 Authentication-Results: sourceware.org; auth=none X-HELO: smtpout1.mo803.mail-out.ovh.net Date: Fri, 14 Jun 2019 15:34:39 -0300 From: "Gabriel F. T. Gomes" To: Adhemerval Zanella CC: Subject: Re: [PATCH 19/28] powerpc: Refactor powerpc32 lrint/lrintf/llrint/llrintf Message-ID: <20190614183439.xfim5xscxpxxkjc5@tereshkova> References: <20190329133529.22523-1-adhemerval.zanella@linaro.org> <20190329133529.22523-20-adhemerval.zanella@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20190329133529.22523-20-adhemerval.zanella@linaro.org> User-Agent: NeoMutt/20180716 X-Ovh-Tracer-Id: 16772812390539513545 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduuddrudeiuddguddvkecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemucehtddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd On Fri, Mar 29 2019, Adhemerval Zanella wrote: > This patches consolidates all the powerpc llrint{f} implementations on > the generic sysdeps/powerpc/powerpc32/fpu/s_llrint{f}. The only missing > optimization is the power6x one which I could not make GCC generates > mftgpr for 32 bits output. I see, and such optimization was never implemented anyway, so no harm done. The patch looks good to me. Thanks. Reviewed-by: Gabriel F. T. Gomes > +++ b/sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_llrint-power6.c > @@ -0,0 +1,2 @@ > +#define __llrint __llrint_power6 > +#include > > [...] > > +++ b/sysdeps/powerpc/powerpc32/power4/fpu/multiarch/s_llrint-ppc32.c > @@ -0,0 +1,2 @@ > +#define __llrint __llrint_ppc32 > +#include 00079d80 <__llrint_power6>: 79d80: 94 21 ff f0 stwu r1,-16(r1) 79d84: fc 20 0e 5c fctid f1,f1 79d88: d8 21 00 08 stfd f1,8(r1) 79d8c: 80 61 00 08 lwz r3,8(r1) 79d90: 80 81 00 0c lwz r4,12(r1) 79d94: 38 21 00 10 addi r1,r1,16 79d98: 4e 80 00 20 blr 00079da0 <__llrint_ppc32>: 79da0: 94 21 ff f0 stwu r1,-16(r1) 79da4: fc 20 0e 5c fctid f1,f1 79da8: d8 21 00 08 stfd f1,8(r1) -> 79dac: 60 00 00 00 nop 79db0: 80 61 00 08 lwz r3,8(r1) 79db4: 80 81 00 0c lwz r4,12(r1) 79db8: 38 21 00 10 addi r1,r1,16 79dbc: 4e 80 00 20 blr > -ENTRY (__llrint) > - CALL_MCOUNT > - stwu r1,-16(r1) > - cfi_adjust_cfa_offset (16) > - fctid fp13,fp1 > - stfd fp13,8(r1) > - nop /* Insure the following load is in a different dispatch group */ > - nop /* to avoid pipe stall on POWER4&5. */ > - nop > - lwz r3,8+HIWORD(r1) > - lwz r4,8+LOWORD(r1) > - addi r1,r1,16 > - blr > - END (__llrint) OK.