From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on dcvr.yhbt.net X-Spam-Level: X-Spam-ASN: AS31976 209.132.180.0/23 X-Spam-Status: No, score=-4.1 required=3.0 tests=AWL,BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_PASS,SPF_PASS shortcircuit=no autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dcvr.yhbt.net (Postfix) with ESMTPS id 4EB1C1F453 for ; Thu, 25 Apr 2019 01:57:13 +0000 (UTC) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:from:to:cc:subject:message-id:references :mime-version:content-type:in-reply-to; q=dns; s=default; b=vpLe rTWLHaTf8bnd59N7+dPcg/g4JzihIuYKRksR+nYHmTVzXkHgQXf28JlgpAHYy1Gn XDBguFHCdvhAidJXgcbge5mnpA5to67dYjh7dRCEUmG/biB9tbXuyEjrIJzcQFnT 5R0OsnEwuoOSUn2/2ni4M2pr+//xXGx1Aezj69s= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:from:to:cc:subject:message-id:references :mime-version:content-type:in-reply-to; s=default; bh=krhhAV/UvF ZnJM9VtZx6x4Qy6s0=; b=sX7y3//SF6aN8kEL6HRai+yjPlU2N6JIC2+yXvFJja pp0AOVHp87Bgejmf0kOuHMhAfGfymnhO1KTBjU6i0hlL2+4tGY/Udstjv9Qb7AiZ LgS4UWHJEA+AOyaQiffB3fEONVfVYXkIWXKph1/IMOHb/+Vi2yfAF05PNSCG64TF A= Received: (qmail 80724 invoked by alias); 25 Apr 2019 01:57:10 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 80545 invoked by uid 89); 25 Apr 2019 01:57:10 -0000 Authentication-Results: sourceware.org; auth=none X-HELO: smtpout1.mo528.mail-out.ovh.net Date: Wed, 24 Apr 2019 22:56:55 -0300 From: "Gabriel F. T. Gomes" To: Adhemerval Zanella CC: Subject: Re: [PATCH 04/28] powerpc: ceil/ceilf refactor Message-ID: <20190425015655.c2wckfwowa4xboc4@tereshkova> References: <20190329133529.22523-1-adhemerval.zanella@linaro.org> <20190329133529.22523-5-adhemerval.zanella@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20190329133529.22523-5-adhemerval.zanella@linaro.org> User-Agent: NeoMutt/20180716 X-Ovh-Tracer-Id: 1436085334727184073 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduuddrheefgdehudcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemucehtddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd On Fri, Mar 29 2019, Adhemerval Zanella wrote: > > The IFUNC organization for powerpc64 is also change to be enabled only > for powerpc64 and not for powerpc64le. OK. > * sysdeps/powerpc/fpu/fenv_libc.h (__fesetround_inline_nocheck): New > macro. I really wish we can get rid of the burden of writing changelogs, but for now shouldn't this be function, instead of macro? > +/* Same as __fesetround_inline, however without runtime check to use DFP > + mtfsfi syntax or if round is valid. */ What would be a runtime check to use DFP syntax? Are you referring to the optional third parameter (W) to mtfsfi? I don't see such mechanism in __fesetround_inline, so I'm not sure I understand this comment/comparison. > +static inline void > +__fesetround_inline_nocheck (const int round) > +{ > + asm volatile ("mtfsfi 7,%0" : : "i" (round)); > +} > + The implementation looks OK. > +enum round_mode > +{ > + CEIL, > + FLOOR, > + ROUND, > + TRUNC, > + NEARBYINT, > +}; OK. To be used in following patches. > +static inline void > +set_fenv_mode (enum round_mode mode) > +{ > + int rmode; > + switch (mode) > + { > + case CEIL: rmode = FE_UPWARD; break; > + default: rmode = FE_TONEAREST; break; > + } > + __fesetround_inline_nocheck (rmode); > +} OK. > +static inline float > +round_to_integer_float (enum round_mode mode, float x) > +{ > + /* Ensure sNaN input is converted to qNaN. */ > + if (__glibc_unlikely (isnan (x))) > + return x + x; > + > + if (fabs (x) > 0x1p+23) > + return x; > + > + float r = x; > + > + /* Save current FPU rounding mode and inexact state. */ > + fenv_t fe = fegetenv_register (); > + set_fenv_mode (mode); > + if (x > 0.0) > + { > + r += 0x1p+23; > + r -= 0x1p+23; > + r = fabs (r); > + } > + else if (x < 0.0) > + { > + r -= 0x1p+23; > + r += 0x1p+23; > + r = -fabs (r); > + } > + __builtin_mtfsf (0xff, fe); > + > + return r; > +} Ok. > +static inline double > +round_to_integer_double (enum round_mode mode, double x) > +{ > + /* Ensure sNaN input is converted to qNaN. */ > + if (__glibc_unlikely (isnan (x))) > + return x + x; > + > + if (fabs (x) > 0x1p+52) > + return x; > + > + double r = x; > + > + /* Save current FPU rounding mode and inexact state. */ > + fenv_t fe = fegetenv_register (); > + set_fenv_mode (mode); > + if (x > 0.0) > + { > + r += 0x1p+52; > + r -= 0x1p+52; > + r = fabs (r); > + } > + else if (x < 0.0) > + { > + r -= 0x1p+52; > + r += 0x1p+52; > + r = -fabs (r); > + } > + __builtin_mtfsf (0xff, fe); > + > + return r; > +} OK. > +double > +__ceil (double x) > +{ > +#ifdef _ARCH_PWR5X > + return __builtin_ceil (x); > +#else > + return round_to_integer_double (CEIL, x); > +#endif The arch check looks correct.