From: "Paul A. Clarke" <pc@us.ibm.com>
To: libc-alpha@sourceware.org
Cc: tuliom@ascii.art.br, murphyp@linux.ibm.com
Subject: [PATCH] [powerpc] __fesetround_inline optimizations
Date: Tue, 10 Sep 2019 15:30:03 -0500 [thread overview]
Message-ID: <1568147403-16828-1-git-send-email-pc@us.ibm.com> (raw)
From: "Paul A. Clarke" <pc@us.ibm.com>
On POWER9, use more efficient means to update the 2-bit rounding mode
via the 'mffscrn' instruction (instead of two 'mtfsb0/1' instructions
or one 'mtfsfi' instruction that modifies 4 bits).
2019-09-10 Paul A. Clarke <pc@us.ibm.com>
* sysdeps/powerpc/fpu/fenv_libc.h (__fesetround_inline): Use
'mffscrn' instruction on POWER9.
(__fesetround_inline_nocheck): Likewise.
---
sysdeps/powerpc/fpu/fenv_libc.h | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
index 3173bc2..990e1d0 100644
--- a/sysdeps/powerpc/fpu/fenv_libc.h
+++ b/sysdeps/powerpc/fpu/fenv_libc.h
@@ -128,7 +128,12 @@ typedef union
static inline int
__fesetround_inline (int round)
{
- if ((unsigned int) round < 2)
+#ifdef _ARCH_PWR9
+ __fe_mffscrn (round);
+#else
+ if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00))
+ __fe_mffscrn (round);
+ else if ((unsigned int) round < 2)
{
asm volatile ("mtfsb0 30");
if ((unsigned int) round == 0)
@@ -144,7 +149,7 @@ __fesetround_inline (int round)
else
asm volatile ("mtfsb1 31");
}
-
+#endif
return 0;
}
@@ -153,7 +158,14 @@ __fesetround_inline (int round)
static inline void
__fesetround_inline_nocheck (const int round)
{
- asm volatile ("mtfsfi 7,%0" : : "i" (round));
+#ifdef _ARCH_PWR9
+ __fe_mffscrn (round);
+#else
+ if (__glibc_likely (GLRO(dl_hwcap2) & PPC_FEATURE2_ARCH_3_00))
+ __fe_mffscrn (round);
+ else
+ asm volatile ("mtfsfi 7,%0" : : "i" (round));
+#endif
}
#define FPSCR_MASK(bit) (1 << (31 - (bit)))
--
1.8.3.1
reply other threads:[~2019-09-10 20:30 UTC|newest]
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