From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on dcvr.yhbt.net X-Spam-Level: X-Spam-ASN: AS31976 209.132.180.0/23 X-Spam-Status: No, score=-2.7 required=3.0 tests=AWL,BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_HI,RCVD_IN_SORBS_SPAM, RP_MATCHES_RCVD shortcircuit=no autolearn=no autolearn_force=no version=3.4.0 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by dcvr.yhbt.net (Postfix) with ESMTP id AF86220401 for ; Tue, 27 Jun 2017 12:17:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752868AbdF0MRf (ORCPT ); Tue, 27 Jun 2017 08:17:35 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:34705 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752605AbdF0MRc (ORCPT ); Tue, 27 Jun 2017 08:17:32 -0400 Received: by mail-wm0-f68.google.com with SMTP id p204so622979wmg.1 for ; Tue, 27 Jun 2017 05:17:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references:mime-version:content-transfer-encoding; bh=UIEMwKrGzgvZn0OnlMhWOACn26Ezb/0A9EkBi7TNn7s=; b=tQoKwSEE75ymmO0gqcUojEZOUJ3pDITlddCIWsHDEwwKkHsVc/Zps4vichAO9vzNeC BPNTTRHDYtXNSI9bi0iNno1cIVobC/ONuRODW314MK4/uklq4G5YuLvNkJd2F6uzDIuN PnnmdfDF8zs4OD9HpELEljPxESu4tCLARDbdFos5uGfyxbfTZC3ZFIKBx+Pea0GguuHO V+/g4q3mx5Jzt8Ed1oHkohhDpA9vNEuJDn6q6qBXTWy1Ku9moF+M2RGu+AtbCOIGdJ/r 8NEV6or6nUosM5yKCdqJfjQqKRugCTgzEIsdR7F0wGKjCfQ8o/1Dq9iMmHxaQ8K2fhwe W7ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references:mime-version :content-transfer-encoding; bh=UIEMwKrGzgvZn0OnlMhWOACn26Ezb/0A9EkBi7TNn7s=; b=rqgWTj3QRvSg2tqijDGDwJfRvYgDUiJGxWLmdsoRfF1dhWTIhq40/IkYtXooHf4Wu/ 7m+OuwwUw+/E74FmvasJNDB0ToQ8y3h8U9ldYARYqWHA/NuCFVNRvOVq+RxeOK+fesXx l+T5NS6A59o7gUVQE9VQViRr9H7bPG2kcLPNT7T/Fv6s4QI+qOW/v/yK7KA0lWZiJ5Ax in/XySwWDta3Fxyap37SVAGNo5zOTsZhpg4Zk0jN3yfX5//T+TF6rzLEQNL0VaHH6mmP RY1klmzY0qoPDgfDnZZsPfnltBR8ozi/8X7AQJmtAGuPHZUNb78bqfP35Dza0KKCX2nf l9gg== X-Gm-Message-State: AKS2vOzdYcwGewOnznZhEZWDKPZYGqa8SIxFIKV+cZJq7Kuw70Wxx9ET bPGqI7SAnySs9rdHGbM= X-Received: by 10.80.185.3 with SMTP id m3mr3657692ede.41.1498565850879; Tue, 27 Jun 2017 05:17:30 -0700 (PDT) Received: from u.nix.is ([2a01:4f8:190:5095::2]) by smtp.gmail.com with ESMTPSA id l17sm1510926edc.39.2017.06.27.05.17.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Jun 2017 05:17:30 -0700 (PDT) From: =?UTF-8?q?=C3=86var=20Arnfj=C3=B6r=C3=B0=20Bjarmason?= To: git@vger.kernel.org Cc: Junio C Hamano , Jeff King , Michael Kebe , "Liam R . Howlett" , Adam Dinwoodie , Stefan Beller , =?UTF-8?q?=C3=86var=20Arnfj=C3=B6r=C3=B0=20Bjarmason?= Subject: [PATCH 1/3] sha1dc: update from my PR #36 Date: Tue, 27 Jun 2017 12:17:16 +0000 Message-Id: <20170627121718.12078-2-avarab@gmail.com> X-Mailer: git-send-email 2.13.1.611.g7e3b11ae1 In-Reply-To: <20170627121718.12078-1-avarab@gmail.com> References: <20170627121718.12078-1-avarab@gmail.com> In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: git-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: git@vger.kernel.org Update sha1dc from my PR #36[1] which'll hopefully be integrated by upstream soon. This solves the Big Endian detection on Solaris reported against v2.13.2[2], hopefully without any regressions. See commit a0103914c2 ("sha1dc: update from upstream", 2017-05-20) and 6b851e536b ("sha1dc: update from upstream", 2017-06-06) for previous attempts in the 2.13 series to address various compile-time feature detection in this library. 1. https://github.com/cr-marcstevens/sha1collisiondetection/pull/36 https://github.com/avar/sha1collisiondetection/commit/56ab30c4c998e1e7f3075705087a2f0c4c4202d7 2. (https://public-inbox.org/git/CAKKM46tHq13XiW5C8sux3=PZ1VHSu_npG8ExfWwcPD7rkZkyRQ@mail.gmail.com/) Signed-off-by: Ævar Arnfjörð Bjarmason --- sha1dc/sha1.c | 80 +++++++++++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 61 insertions(+), 19 deletions(-) diff --git a/sha1dc/sha1.c b/sha1dc/sha1.c index facea1bb56..1ff325b37a 100644 --- a/sha1dc/sha1.c +++ b/sha1dc/sha1.c @@ -23,6 +23,13 @@ #include "sha1.h" #include "ubc_check.h" +#if (defined(__amd64__) || defined(__amd64) || defined(__x86_64__) || defined(__x86_64) || \ + defined(i386) || defined(__i386) || defined(__i386__) || defined(__i486__) || \ + defined(__i586__) || defined(__i686__) || defined(_M_IX86) || defined(__X86__) || \ + defined(_X86_) || defined(__THW_INTEL__) || defined(__I86__) || defined(__INTEL__) || \ + defined(__386) || defined(_M_X64) || defined(_M_AMD64)) +#define SHA1DC_ON_INTEL_LIKE_PROCESSOR +#endif /* Because Little-Endian architectures are most common, @@ -32,28 +39,70 @@ If you are compiling on a big endian platform and your compiler does not define one of these, you will have to add whatever macros your tool chain defines to indicate Big-Endianness. */ -#ifdef SHA1DC_BIGENDIAN -#undef SHA1DC_BIGENDIAN + +#if defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) +/* + * Should detect Big Endian under GCC since at least 4.6.0 (gcc svn + * rev #165881). See + * https://gcc.gnu.org/onlinedocs/cpp/Common-Predefined-Macros.html + * + * This also works under clang since 3.2, it copied the GCC-ism. See + * clang.git's 3b198a97d2 ("Preprocessor: add __BYTE_ORDER__ + * predefined macro", 2012-07-27) + */ +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ +#define SHA1DC_BIGENDIAN #endif -#if (defined(_BYTE_ORDER) || defined(__BYTE_ORDER) || defined(__BYTE_ORDER__)) +#else /* Not under GCC-alike */ -#if ((defined(_BYTE_ORDER) && (_BYTE_ORDER == _BIG_ENDIAN)) || \ - (defined(__BYTE_ORDER) && (__BYTE_ORDER == __BIG_ENDIAN)) || \ - (defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __BIG_ENDIAN__)) ) +#if defined(__BYTE_ORDER) && defined(__BIG_ENDIAN) +/* + * Should detect Big Endian under glibc.git since 14245eb70e ("entered + * into RCS", 1992-11-25). Defined in which will have been + * brought in by standard headers. See glibc.git and + * https://sourceforge.net/p/predef/wiki/Endianness/ + */ +#if __BYTE_ORDER == __BIG_ENDIAN #define SHA1DC_BIGENDIAN #endif -#else +#else /* Not under GCC-alike or glibc */ -#if (defined(_BIG_ENDIAN) || defined(__BIG_ENDIAN) || defined(__BIG_ENDIAN__) || \ - defined(__ARMEB__) || defined(__THUMBEB__) || defined(__AARCH64EB__) || \ +#if (defined(__ARMEB__) || defined(__THUMBEB__) || defined(__AARCH64EB__) || \ defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || \ defined(__sparc)) +/* + * Should define Big Endian for a whitelist of known processors. See + * https://sourceforge.net/p/predef/wiki/Endianness/ and + * http://www.oracle.com/technetwork/server-storage/solaris/portingtosolaris-138514.html + */ #define SHA1DC_BIGENDIAN -#endif -#endif +#else /* Not under GCC-alike or glibc or */ + +#if defined(SHA1DC_ON_INTEL_LIKE_PROCESSOR) +/* + * As a last resort before we fall back on _BIG_ENDIAN or whatever + * else we're not 100% sure about below, we blacklist specific + * processors here. We could add more, see + * e.g. https://wiki.debian.org/ArchitectureSpecificsMemo + */ +#else /* Not under GCC-alike or glibc or or */ + +#ifdef _BIG_ENDIAN +/* + * Solaris / illumos defines either _LITTLE_ENDIAN or _BIG_ENDIAN in + * . + */ +#define SHA1DC_BIGENDIAN +#else +/*#error "Uncomment this to see if you fall through all the detection"*/ +#endif /* Big Endian because of _BIG_ENDIAN (Solaris)*/ +#endif /* !SHA1DC_ON_INTEL_LIKE_PROCESSOR */ +#endif /* Big Endian under whitelist of processors */ +#endif /* Big Endian under glibc */ +#endif /* Big Endian under GCC-alike */ #if (defined(SHA1DC_FORCE_LITTLEENDIAN) && defined(SHA1DC_BIGENDIAN)) #undef SHA1DC_BIGENDIAN @@ -63,15 +112,8 @@ #endif /*ENDIANNESS SELECTION*/ -#if (defined SHA1DC_FORCE_UNALIGNED_ACCESS || \ - defined(__amd64__) || defined(__amd64) || defined(__x86_64__) || defined(__x86_64) || \ - defined(i386) || defined(__i386) || defined(__i386__) || defined(__i486__) || \ - defined(__i586__) || defined(__i686__) || defined(_M_IX86) || defined(__X86__) || \ - defined(_X86_) || defined(__THW_INTEL__) || defined(__I86__) || defined(__INTEL__) || \ - defined(__386) || defined(_M_X64) || defined(_M_AMD64)) - +#if defined(SHA1DC_FORCE_UNALIGNED_ACCESS) || defined(SHA1DC_ON_INTEL_LIKE_PROCESSOR) #define SHA1DC_ALLOW_UNALIGNED_ACCESS - #endif /*UNALIGNMENT DETECTION*/ -- 2.13.1.611.g7e3b11ae1